Games / Command flash cards / SDC (Synopsys Design Constraints)

SDC (Synopsys Design Constraints) as implemented in OpenSTA

Choose a section to drill, or play every section mixed together. Each section lists the commands it covers, and any kinds of card it holds besides the plain one: a command whose meaning you pick.

SourceThese cards follow SDC (Synopsys Design Constraints) as implemented by OpenSTA, the open-source static timing analyzer used by OpenROAD, and each answer links to that command in the OpenSTA command reference. Commercial timers accept the same commands but can differ in details; where OpenSTA reads a command without acting on it, the card says so. Reference: OpenSTA command reference (OpenSTA on GitHub).

All sections

A mixed round drawn from every section. Due cards come first, then new cards in random order.

96cards across 8 sections

mixed round play

Object access

Finding ports, pins, cells, nets, and clocks so other commands can act on them.

get_portsget_pinsget_cellsget_netsget_clocksall_inputsall_outputsall_clocksall_registerscurrent_designget_libsget_lib_cellsget_lib_pins

General purpose

Units and how names are resolved in the hierarchy.

set_unitscurrent_instanceset_hierarchy_separator

Clocks

Defining clocks and describing their latency, uncertainty, and relationships.

create_clockcreate_generated_clockset_clock_uncertaintyset_clock_latencyset_propagated_clockset_clock_transitionset_clock_groupsset_clock_gating_checkset_senseset_ideal_networkset_ideal_latencyset_ideal_transition

name the commandfind the faultfill the gap

Input and output

Timing and electrical conditions at the block boundary.

set_input_delayset_output_delayset_driving_cellset_input_transitionset_loadset_drive

name the commandfind the faultfill the gap

Timing exceptions

Paths that must be timed differently from the default single-cycle check.

set_false_pathset_multicycle_pathset_max_delayset_min_delaygroup_pathset_disable_timingset_case_analysisset_max_time_borrowset_data_checkset_min_pulse_width

name the commandfind the fault

Design rules

Electrical limits on slew, capacitance, and fanout.

set_max_transitionset_max_capacitanceset_max_fanoutset_min_capacitance

name the command

Environment and derating

Operating conditions and on-chip variation.

set_timing_derateset_operating_conditions

Power and multiple voltages

Supply voltages and voltage-domain regions.

set_voltagecreate_voltage_area