Metal Fill for Density Control
Divide the die into windows and add unconnected metal shapes until every window's density is inside the foundry's range, so polishing leaves each layer flat.
The last distance to a file a foundry can build: fill the empty metal, turn the drawn wires back into resistors and capacitors, prove the power supply holds up, then prove the layout obeys every rule of the process and is still the circuit synthesis wrote.
A correct layout can still be unbuildable. Polishing needs even metal density, so the empty space is filled before the layout is final.
Turn the drawn metal back into electricity: the resistance and capacitance of every wire, and how far the power supply sags under load.
Turn the drawn wires back into resistors and capacitors. Field solvers compute exact values for small structures; production extractors match every wire to precomputed patterns.
Model the power grid as a resistor network with a current drawn at every cell, solve one large sparse linear system, and read how far the supply sags at each cell.
The last two proofs before tapeout: every shape obeys the foundry's geometric rules, and the layout connects exactly as the netlist says.
Check every polygon against the foundry's width, spacing and enclosure rules, with a scanline sweep that only ever compares shapes that are near each other.
Extract the circuit the layout actually builds and compare it with the netlist, refining a partition of devices and nets until each one is matched with its twin.