PD fundamentals concepts, tied to the open tools
Choose a section to drill, or play every section mixed together. Each section lists the commands it covers, and any kinds of card it holds besides the plain one: a command whose meaning you pick.
All sections
A mixed round drawn from every section. Due cards come first, then new cards in random order.
Timing basics
How a check is formed, and what slack actually measures.
setupholdslackarrivalrequiredcritical-pathlaunchcaptureClocking
Latency, skew, jitter, and what they do to the two checks.
latencyskewjitteruncertaintyuseful-skewclock-gatingCDCVariation and corners
Why one analysis is never enough, and how pessimism is managed.
cornersOCVderatingCRPRMCMMagingSignal integrity
What neighbouring wires do to a net's delay and its logic value.
crosstalkdelta-delaynoiseshieldingNDRcouplingPower and current
Where the power goes, and what the current does to the supply.
dynamic-powerleakageIR-dropelectromigrationdecapclock-gatingPhysical effects
Wires, loads, and the quantities that make a layout hard.
wire-delayfanoututilizationcongestionbufferingfloorplanTest concepts
Why a chip needs test logic, and what it costs the physical design.
scancontrollabilityobservabilityATPGstuck-atat-speedscan-reorderInterfaces and budgeting
Timing at a block's edge, and what a block's model hides from the level above.
input-delayoutput-delaysource-synchronousbudgetILMfeedthroughFlow reasoning
Why the flow has the shape it does, and what each stage can still change.
flat-vs-hierarchicalabstractECOclosuretiming-model