Liberty timing libraries read against a real library
Choose a section to drill, or play every section mixed together. Each section lists the commands it covers, and any kinds of card it holds besides the plain one: a command whose meaning you pick.
All sections
A mixed round drawn from every section. Due cards come first, then new cards in random order.
Library header
The units, the delay model, and the conditions a library was characterized at.
time_unitcapacitive_load_unitdelay_modelnom_voltageoperating_conditionsdefault_max_transitionCell and pin groups
What a cell declares about itself, and what each pin declares.
cellareaffpg_pinpindirectioncapacitancefunctionSpecial cells
Latches, tristate outputs, clock gates, and scan flops declare themselves differently.
latchpresetclearthree_statestatetableclock_gating_integrated_celltest_cellTiming arcs
The arcs between pins: what relates them, what kind of check or delay each is.
timingrelated_pintiming_typetiming_sensewhensdf_condDelay tables and models
How a delay is stored, looked up, and which model a library uses.
cell_risecell_fallrise_transitionindex_1index_2lu_table_templateConstraints and limits
Setup, hold, and the electrical limits a cell declares.
setup_risinghold_risingrecovery_risingremoval_risingmax_transitionmax_capacitancemax_fanoutPower
Leakage by state, and the energy a switching cell spends internally.
cell_leakage_powerleakage_powerinternal_powerrise_powerrelated_pg_pinReading a library
Questions about a real Liberty file, quoted from Nangate45.
cellpintimingleakage_power