Library header
Each card shows a command to explain. A missed card returns later in the round and starts the schedule over. A card answered correctly moves up the schedule and next appears after 1, 3, 7, then 21 days. Keys 1 to 4 choose an option, h shows a hint, and Enter moves on. A hint keeps the card where it is on the schedule. An ordering card is answered by clicking its items in order, and one wrong click ends it. Time values are in nanoseconds. Progress is stored in this browser.
All 9 cards in this section, with answers
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time_unit : "1ns"; capacitive_load_unit (1,ff); voltage_unit : "1V"; current_unit : "1mA";Declares the units that every value in the library is expressed in.
Hint: Every number later in the file is bare. Ask what these lines are for.
A delay of 0.02 in this file means 0.02 ns, and a capacitance of 1.14 means 1.14 fF. Mixing libraries whose units differ is a classic way to get timing that is wrong by a factor of a thousand, which is why
report_unitsexists. Liberty reference -
'delay_model : table_lookup;'Says delays come from characterized tables rather than an equation.
Hint: Ask what the alternative would be, and which one a modern library uses.
The older
generic_cmosmodel computed delay from a formula, which is too crude below about 130 nm.table_lookupstores measured values against input transition and output load, which is the NLDM (Non-Linear Delay Model). Current-source models such as CCS (Composite Current Source) add more data alongside these tables. Liberty reference -
nom_process : 1.00; nom_voltage : 1.10; nom_temperature : 25.00; operating_conditions (typical) { ... }Records the process, voltage, and temperature the library was characterized at.
Hint: Ask what would have to change for the same cells to need a second file.
One Liberty file is one corner. A design that must work from a low to a high voltage and over a temperature range needs several files, and sign-off analyses them together. Derating scales around these values; it does not replace them. Liberty reference
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'default_max_transition : 0.198535;'The transition limit used for any pin that does not declare its own.
Hint: The word default says where it applies. Ask what can override it.
Library-level defaults exist for transition, capacitance, and fanout, and a pin may declare a tighter one. Here the value matches the largest transition index in the tables, which is the usual choice: beyond the characterized range the delay would be extrapolated. Liberty reference
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slew_lower_threshold_pct_rise : 30.00 ; slew_upper_threshold_pct_rise : 70.00 ; input_threshold_pct_rise : 50.00 ; output_threshold_pct_rise : 50.00 ;Where on a waveform a delay and a transition are measured.
Hint: A delay is measured between two points on two waveforms. These name the points.
Delay runs from the 50 percent point of the input to the 50 percent point of the output, and a transition is the time between the 30 and 70 percent points. Two libraries measured at different thresholds describe the same silicon with different numbers, so they cannot be mixed without care. Liberty reference
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slew_derate_from_library : 1.00 ;How to scale a threshold-to-threshold transition to the full swing.
Hint: The tables hold a slew measured between thresholds, not a full swing.
A transition measured between the 30 and 70 percent points covers 40 percent of the swing, so a library characterized that way may carry a derate of 0.4. Nangate45 carries 1.00, meaning its values are already what the timer should use. A wrong value scales every transition, and through them every delay. Liberty reference
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voltage_map (VDD,1.10); voltage_map (VSS,0.00);The voltage on each supply rail the cells refer to by name.
Hint: Each cell names its rails by name. Ask what turns a name into a number.
Every cell's
pg_pingroups name a rail, such as VDD or VSS, and this is where those names are given values. It matters most when a design runs several supplies, because the timer has to know which pin sits on which rail before it can check a level shifter or an always-on path. Liberty reference -
wire_load("5K_hvratio_1_1") { capacitance : 1.774000e-01; resistance : 3.571429e-03; fanout_length( 1, 1.7460 ); fanout_length( 2, 3.9394 ); } default_wire_load : "5K_hvratio_1_1" ;A guess at a net's length, and so its parasitics, from its fanout.
Hint: Before a design is placed, nobody knows a net's length. Ask what stands in.
A net with two loads is assumed to be 3.9 units long, which times the resistance and capacitance gives an estimate. It is a pre-layout stand-in only, and it is thrown away once real parasitics are extracted into SPEF (Standard Parasitic Exchange Format). Physical synthesis replaced it with placement-based estimates. Liberty reference
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NangateOpenCellLibrary_typical.lib NangateOpenCellLibrary_typical.dbThe same library as readable text and as a compiled binary.
Hint: Both hold the same library. Ask what differs, and which one you can read.
Commercial tools compile Liberty into a binary that loads faster and hides the source. Open tools read the text form, which is why every excerpt in this deck can be quoted. A very large library is often shipped compressed instead, and
read_libertyaccepts that directly. Liberty reference