Standard-cell library checked against the open libraries
Choose a section to drill, or play every section mixed together. Each section lists the commands it covers, and any kinds of card it holds besides the plain one: a command whose meaning you pick.
All sections
A mixed round drawn from every section. Due cards come first, then new cards in random order.
Naming and drive strength
Reading a cell name: function, drive strength, threshold flavour, and library variant.
INV_X1sky130_fd_sc_hd__inv_1BUFx2_ASAP7_75t_RASAP7_USE_VTsky130hdsky130hsCombinational cells
Why inverting gates are the cheap ones, and what the compound gates compute.
NAND2_X1AND2_X1AOI21_X1OAI21_X1XOR2_X1MUX2_X1HA_X1FA_X1BUF_X1Sequential cells
Flip-flop variants, scan flops, latches, and clock gating cells.
DFF_X1DFFR_X1DFFS_X1DFFRS_X1SDFF_X1dlxtp_1CLKGATE_X1CLKGATETST_X1Clock cells
The cells built for the clock network, and why they are separate.
CLKBUF_X1clkinv_1clkinvlp_2dlygate4sd1_1CTS_LIB_NAMEPhysical-only cells
Cells with no logic function: taps, endcaps, fillers, decap, diodes, and ties.
TAPCELL_X1FILLCELL_X1decap_8ANTENNA_X1diode_2LOGIC0_X1LOGIC1_X1conb_1Using the library
The choices a flow makes among the cells, and when each one helps.
threshold voltageupsizingbufferinglogical effortdont-useViews and characterization
What each library view carries, what a corner is, and the limits a cell declares.
libertylefgdsmax_transitionmax_capacitanceoperating_conditions