Games / Command flash cards / OpenROAD flow commands

OpenROAD flow commands as implemented in OpenROAD

Choose a section to drill, or play every section mixed together. Each section lists the commands it covers, and any kinds of card it holds besides the plain one: a command whose meaning you pick.

SourceThese cards follow OpenROAD's own commands, checked against the signatures printed by the tool (OpenROAD 26Q3) and the documentation of the module that implements each one. Each answer links to that module's documentation. Commands differ between versions, and commercial tools use different names entirely. Reference: OpenROAD module documentation (OpenROAD on GitHub).

All sections

A mixed round drawn from every section. Due cards come first, then new cards in random order.

141cards across 14 sections
mixed round play

Reading and writing a design

Getting a design in and out: libraries, netlist, layout, and the tool's database.

read_lefread_libertyread_veriloglink_designread_defwrite_defread_dbwrite_dbwrite_verilogwrite_abstract_lefwrite_cdl
put in order
11 cards play

Floorplan

Die and core area, rows and tracks, boundary pins, macros, and well taps.

initialize_floorplanmake_tracksplace_pinsplace_pinset_io_pin_constraintplace_macrortl_macro_placerset_macro_halotapcellplace_tapcellscut_rowscreate_blockagewrite_macro_placement
name the commandput in order
16 cards play

Power delivery network

Connecting supplies, describing the grid, building it, and checking the drop.

add_global_connectionglobal_connectdefine_pdn_gridadd_pdn_stripeadd_pdn_ringadd_pdn_connectpdngenrepair_pdn_viasanalyze_power_gridcheck_power_grid
name the command
12 cards play

Placement

Spreading the cells, legalizing them onto rows, and filling the gaps.

global_placementdetailed_placementcheck_placementimprove_placementset_placement_paddingfiller_placementremove_fillerscluster_flopsbalance_row_usageoptimize_mirroring
11 cards play

Clock tree synthesis

Building and reporting the clock tree.

clock_tree_synthesisconfigure_cts_characterizationreport_ctsrepair_clock_netsrepair_clock_inverters
7 cards play

Optimization and repair

Fixing design rules and timing by sizing, buffering, and cloning.

repair_designrepair_timingrepair_tie_fanoutbuffer_portsremove_buffersset_dont_usereport_dont_useset_dont_touchinsert_buffereliminate_dead_logicset_opt_config
put in order
15 cards play

Routing

Layer choice, global routing and congestion, detailed routing, and antennas.

set_routing_layersset_global_routing_layer_adjustmentglobal_routepin_accessdetailed_routeset_routing_alphacreate_ndrassign_ndrwrite_guidescheck_antennasrepair_antennas
11 cards play

Parasitics

Wire resistance and capacitance, estimated early and extracted after routing.

set_wire_rcset_layer_rcreport_layer_rcestimate_parasiticsextract_parasiticswrite_spefread_spefdefine_process_corner
name the command
9 cards play

Design reports and checks

Area, cell counts, wirelength, and the checks a script uses between stages.

report_design_areareport_cell_usagereport_wire_lengthreport_floating_netsreport_long_wiresreport_buffersdesign_is_routedall_pins_placed
8 cards play

DFT (Design for Test)

Scan replacement and stitching the scan chains.

set_dft_configscan_replaceexecute_dft_planreport_dft_planreport_dft_configscan_opt
6 cards play

Power intent (UPF)

Power domains, switches, isolation, and level shifters.

read_upfwrite_upfcreate_power_domaincreate_power_switchmap_power_switchset_isolationset_level_shifteruse_interface_cellcreate_voltage_domainreport_voltage_domains
11 cards play

Pads and bumps

The pad ring, bond pads, the flip-chip bump array, and redistribution routing.

make_io_sitesplace_padplace_padsplace_cornersplace_io_fillplace_io_terminalsconnect_by_abutmentplace_bondpadmake_io_bump_arrayassign_io_bumprdl_route
12 cards play

3D packaging (3DBlox)

Describing a die stack and checking it.

read_3dbxreport_3dic_summarycheck_3dbloxadd_3dblox_alignment_marker_rule
4 cards play

Reading real output

Questions about real log and report output from a flow run, line by line.

global_routeglobal_placementdetailed_routetapcellclock_tree_synthesischeck_antennasreport_design_area
read the output
8 cards play