Games / Command flash cards / OpenROAD-flow-scripts variables

OpenROAD-flow-scripts variables as implemented in OpenROAD-flow-scripts

Choose a section to drill, or play every section mixed together. Each section lists the commands it covers, and any kinds of card it holds besides the plain one: a command whose meaning you pick.

SourceThese cards cover the make variables that drive OpenROAD-flow-scripts, the reference flow built on OpenROAD. Each card shows a line as it appears in a design's or a platform's config.mk, and each answer links to that variable in the flow's own variable reference. Variables come and go between releases; this deck follows the version in the openroad/orfs image. Reference: flow variable reference (OpenROAD-flow-scripts on GitHub).

All sections

A mixed round drawn from every section. Due cards come first, then new cards in random order.

84cards across 9 sections
mixed round play

Design and platform

What is being built and what it is built from: sources, constraints, libraries, macros.

DESIGN_NAMEDESIGN_NICKNAMEPLATFORMVERILOG_FILESVERILOG_INCLUDE_DIRSSDC_FILEADDITIONAL_LEFSADDITIONAL_LIBSADDITIONAL_GDSLIB_FILESSC_LEFTECH_LEFBLOCKS
10 cards play

Synthesis

How the netlist is produced: hierarchy, optimization target, and cell mappings.

SYNTH_HIERARCHICALSYNTH_MINIMUM_KEEP_SIZEABC_AREAABC_DRIVER_CELLABC_LOAD_IN_FFADDER_MAP_FILECLKGATE_MAP_FILELATCH_MAP_FILETIEHI_CELL_AND_PORTTIELO_CELL_AND_PORTSYNTH_HDL_FRONTENDSYNTH_NETLIST_FILESSWAP_ARITH_OPERATORS
12 cards play

Floorplan

Die and core size, macro handling, and the scripts for pins, power, and taps.

CORE_UTILIZATIONCORE_ASPECT_RATIOCORE_MARGINDIE_AREACORE_AREAPLACE_SITEMACRO_PLACE_HALOMACRO_WRAPPERSMACRO_PLACEMENT_TCLRTLMP_MAX_MACROIO_CONSTRAINTSPDN_TCLTAPCELL_TCLFLOORPLAN_DEF
13 cards play

Placement

Density, padding, pin layers, and the placement options a design can turn on.

PLACE_DENSITYPLACE_DENSITY_LB_ADDONCELL_PAD_IN_SITES_GLOBAL_PLACEMENTCELL_PAD_IN_SITES_DETAIL_PLACEMENTIO_PLACER_HIO_PLACER_VPLACE_PINS_ARGSGLOBAL_PLACEMENT_ARGSGPL_TIMING_DRIVENCLUSTER_FLOPSENABLE_DPODONT_USE_CELLS
11 cards play

Clock tree synthesis

Sink clustering, buffer distance, and the library the clock buffers come from.

CTS_CLUSTER_SIZECTS_CLUSTER_DIAMETERCTS_BUF_DISTANCECTS_ARGSCTS_LIB_NAMESKIP_CTS_REPAIR_TIMING
6 cards play

Routing

Which layers may be used, how their capacity is derated, and router options.

MIN_ROUTING_LAYERMAX_ROUTING_LAYERMIN_CLK_ROUTING_LAYERROUTING_LAYER_ADJUSTMENTFASTROUTE_TCLDISABLE_VIA_GENENABLE_RESISTANCE_AWARE
6 cards play

Timing and optimization

Margins, how much of the failing tail is repaired, and which repairs are skipped.

TNS_END_PERCENTSETUP_SLACK_MARGINHOLD_SLACK_MARGINCAP_MARGINSLEW_MARGINSKIP_GATE_CLONINGSKIP_INCREMENTAL_REPAIRSKIP_LAST_GASPRECOVER_POWERMATCH_CELL_FOOTPRINT
10 cards play

Finishing and outputs

Fill, supply voltages for analysis, extraction rules, and the files the flow writes.

FILL_CELLSUSE_FILLFILL_CONFIGPWR_NETS_VOLTAGESGND_NETS_VOLTAGESIR_DROP_LAYERGDS_ALLOW_EMPTYSEAL_GDSCDL_FILEKLAYOUT_TECH_FILERCX_RULESCORNER
10 cards play

Running the flow

Switches that change how a run behaves rather than what the design is.

OPENROAD_HIERARCHICALSKIP_REPORT_METRICSLEC_CHECKREMOVE_CELLS_FOR_LECGPL_RANDOM_SEEDASAP7_USE_VTCORNERS
6 cards play