PVT (Process, Voltage, Temperature) Corners and Multi-Corner Sign-Off
The idea
No chip is built at nominal conditions. Manufacturing shifts every transistor's speed within a distribution, the supply sags and spikes, and the die runs anywhere from cold start to full load. Sign-off does not analyze the distribution; it analyzes its bounding box, the corners:
A corner is one combination of three settings, and sign-off means timing is clean at every required combination:
- Process: the transistor speed bin: SS (Slow n-type, Slow p-type), TT (Typical, Typical), FF (Fast, Fast), and the skewed SF and FS combinations; each has its own Liberty tables.
- Voltage: nominal supply plus and minus its tolerance, and any low-power operating modes.
- Temperature: the specified range, typically minus 40 to 125 °C for industrial and automotive parts; at advanced nodes delay can worsen at low temperature (temperature inversion), so both ends must be checked.
Setup (maximum delay) is traditionally worst at slow-process, low- voltage, high-temperature; hold (minimum delay) at fast-process, high-voltage, low-temperature. Wire parasitics have their own corners (thin or thick metal, high or low dielectric), and every RC (Resistance-Capacitance) (Resistance-Capacitance) corner multiplies the count. Modern sign-off runs tens of corners, and multi-mode analysis (functional, test, low power) multiplies again.
How the flow handles it
Step 1 (define). The design specification fixes the voltage and temperature ranges and which process bins must yield.
Step 2 (characterize). The library ships one Liberty file per process-voltage-temperature point; missing points are interpolated or derated.
Step 3 (analyze). STA (Static Timing Analysis) runs at every corner (multi-corner, multi-mode); the worst setup and worst hold across corners are the sign-off numbers.
Step 4 (close). Optimization must fix a violation at one corner without opening one at another; hold fixes at the fast corner (added delay) and setup fixes at the slow corner (removed delay) pull in opposite directions.
Pros, cons, and the trade-off
Strengths
- Guarantee: a chip clean at the corners works throughout the box, without statistical modeling.
- Tool simplicity: each corner is an ordinary STA (Static Timing Analysis) run.
Weaknesses
- Pessimism: real chips rarely sit at a corner; designing for the box leaves performance on the table.
- Corner explosion: dozens of corners times modes means long sign-off runs and large characterization cost.
- Corners do not cover everything: within-die variation is handled separately (see the on-chip variation page).
The trade-off
Corner-based sign-off buys certainty with pessimism: bounding the distribution is simple and safe, and it wastes the margin between the corner and the typical chip. Every advanced-node flow spends effort clawing that margin back without giving up the guarantee.
Where to see it
- Open source: SKY130 ships Liberty files at several corners (for example tt_025C_1v80, ss_100C_1v60, ff_n40C_1v95); the OpenROAD flow's platform configuration selects which are used for setup and hold.
- Commercial: multi-corner multi-mode analysis is a standard sign-off feature; large designs check tens of scenarios.