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The Metal Stack and Design Rules

Foundry Processes foundational every foundry the router's world, defined

The idea

The metal stack is the list of wiring layers a process offers, from the fine local layers just above the transistors to the thick global layers at the top, and the vias that connect them. Each layer has a routing pitch, a preferred direction, and a thickness that sets its resistance:

Each layer is described by a handful of parameters, and each via by a few more:

  • Pitch: the distance between adjacent routing tracks; the router's grid on that layer.
  • Direction: horizontal or vertical preferred routing, alternating layer by layer so crossings are cheap and parallel runs are far apart.
  • Thickness: thin lower layers for density, thick upper layers for low resistance (power, clocks, long signals); resistance per length scales inversely with width times thickness.
  • Minimum width and spacing: the smallest wire and the smallest gap the layer can print.
  • Via cut size, enclosure, and spacing: how large a via is, how far the metal above and below must extend beyond it, and how close two vias may sit; enclosure is the rule that makes pin access hard.

The rules that matter to a router

The full DRC (Design Rule Check) deck has hundreds of rules; a handful account for nearly everything the router deals with:

  • Minimum width and spacing: a wire may be no narrower than the layer's minimum, and two shapes no closer than the minimum spacing, which grows for wider or longer parallel runs (spacing tables).
  • Via enclosure: the metal above and below a via must extend beyond the cut, sometimes more on two opposite sides than the other two.
  • End-of-line spacing: the end of a wire needs extra clearance from shapes it points at.
  • Minimum area: a metal shape below a certain area cannot be reliably manufactured, so tiny stubs must be enlarged.
  • Antenna ratios: per-layer limits on collecting metal area versus gate area (see the routing section's antenna page).
  • Density: each layer must be filled to within a window-averaged range so the polishing step is uniform; the flow inserts dummy metal fill after routing.

The router honours these in its own model (LEF (Library Exchange Format) rules and spacing tables); the sign-off DRC (Design Rule Check) deck is the authority, and any difference between the two surfaces as violations to repair.

Pros, cons, and the trade-off

Strengths of the stack design

  • Alternating directions make routing tractable: any two points connect with at most a few layer changes.
  • Layered thickness lets one process serve dense local wiring and low-resistance global wiring at once.
  • Rules as a contract: a layout that passes DRC (Design Rule Check) will manufacture, without the designer knowing the process.

Weaknesses

  • Rule count grows every node: hundreds of rules with context dependence, which routers approximate and DRC (Design Rule Check) enforces exactly.
  • Vias are expensive: resistance, area, and blocked tracks on two layers for every layer change.
  • Lower layers keep getting slower: as pitches shrink, thin-wire resistance climbs faster than gate delay falls.

The trade-off

The metal stack is the process's answer to a contradiction: wires must be dense where the logic is and fast where the distances are. Splitting the stack by thickness resolves it, at the price of vias between the regimes and a rule deck that grows with every node.

Where to see one

  • Open source: the SKY130 periphery rules list every rule with a diagram; the process has 5 metal layers plus local interconnect, small enough to read in one sitting.
  • The router's copy: the technology LEF (Library Exchange Format) in any OpenROAD platform directory shows the subset of rules a router models.
  • Advanced nodes: 10 to 15 metal layers and rule decks in the thousands of rules, under NDA (Non-Disclosure Agreement).

References and further reading