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Electromigration and IR (Current Times Resistance) Drop

Foundry Processes research every sign-off flow the wires have to survive

The idea

Electromigration is momentum transfer from electrons to metal atoms: at high current density, atoms drift downstream, forming voids (opens) upstream and hillocks (shorts) downstream over months or years. The lifetime model is Black's equation:

MTTF (Mean Time To Failure) = A × J^(−n) × exp(Ea / (k × T))

MTTF mean time to failure of the wire segment
J current density (current per cross-section); the dominant design lever, and the reason every layer has a maximum current per width in the PDK (Process Design Kit)
n an exponent near 2 for copper; halving current density roughly quadruples life
Ea, T activation energy and absolute temperature; hotter wires fail sooner, so limits are specified at the operating temperature

IR (current times resistance) drop is Ohm's law in the power grid: current drawn by cells flows through the resistance of the supply wires, and the voltage at a cell is the pad voltage minus that drop. Cells at lower voltage are slower, and if the drop is large enough, timing sign-off at the nominal corner is invalid:

V(cell) = V(pad) − sum over the supply path of I × R

I current through each grid segment: the sum of the demand of everything downstream; static (average) for the DC (Direct Current) check, switching peaks for the dynamic check
R the segment's resistance, from the metal stack: thick top layers are cheap, thin lower layers expensive, and vias between them count

How the flow addresses both

Step 1 (grid design). Floorplanning builds the power grid: rings and stripes on thick upper metal, denser rails on lower layers, via stacks between. Wider and denser buys lower drop and higher current capacity, at the cost of routing tracks.

Step 2 (analyze). After placement (estimated switching) and after routing (extracted resistances), a power-integrity tool solves the grid for static and dynamic IR (current times resistance) drop and checks each segment's current density against the electromigration limits.

Step 3 (repair). Widen or add stripes, add vias, spread high-current cells, or add decoupling capacitance for dynamic drop; for signal electromigration, widen the wire or lower the driver's current.

Step 4 (sign off). Drop within the budget assumed by the timing corners; every segment under its electromigration limit at the target lifetime and temperature.

Pros, cons, and the trade-off

Strengths of the methodology

Well modeled: both effects reduce to resistances and currents the flow already extracts.
Grid design is a lever: over-designing the grid buys margin directly.

Weaknesses

Grid area versus routing: every stripe is tracks the router loses; dense grids fight congestion.
Dynamic drop depends on activity: the worst switching pattern is hard to know, so vectorless analysis is pessimistic and vector-based analysis is only as good as its vectors.
Advanced-node margins shrink: lower supply voltage makes the same drop a larger fraction, and thinner wires carry less current.

The trade-off

The power grid is metal spent on nothing but delivering voltage, and every track it takes is one the signals cannot use. Electromigration and IR (current times resistance) drop analysis decide how much of that tax is enough, and at low supply voltages the answer keeps rising.

Where to see it

Open source: OpenROAD's power-integrity module computes static IR (current times resistance) drop on the built grid; the flow reports the worst drop per supply net.
The process: current-density limits per layer and via are part of every PDK (Process Design Kit)'s reliability rules.
Commercial: exposed as tool options. Static and dynamic IR (current times resistance) drop and electromigration sign-off are standard tools in every tape-out flow.