Retiming

Retiming. A pipeline is a chain of combinational gates split into stages by registers, and its clock period is set by the slowest stage: the longest run of gate delay between two adjacent registers. Retiming relocates registers across the gates, without changing what the circuit computes at its inputs and outputs, so the stages are balanced and the slowest one is as fast as possible.

This chain has fixed input and output registers and two movable internal registers (three stages). They start bunched near the end, so one stage carries almost all the delay. Click a boundary between two gates to move a register there. Moving a register earlier shortens the stage after it and lengthens the one before, so it is a balancing act.

Keep exactly two internal registers (a pipeline's register count is fixed, it sets the latency), balance the three stages to the smallest possible period, then Submit retiming.