Problems / Clock Tree Synthesis / Multi-bit flip-flop banking

Multi-bit flip-flop banking

Clock Tree Synthesis hard interactive · in-browser

Multi-bit flip-flop banking. Merging two nearby single-bit flip-flops into a 2-bit bank lets them share one clock buffer, cutting clock power. But the pair snaps to its midpoint, so its data nets change length.

  • Enough banks - click a candidate merge (dashed link) to bank the pair. Each flip-flop can be in at most one bank. Reach the merge target.
  • Data wirelength in budget - banking tight pairs is cheap, but banking flip-flops that sit far apart stretches their data nets past the budget.

Bank the tight pairs, leave the far ones single, then Submit design.