Every situation

Three of the four land on 0.42 and one reaches 0.40, and it is the one that never touched the layout. The block was not short of room: it was short of period, because a fifth of the cycle was promised away at each port before the logic got any. Giving half of that back also costs the least area of the four, since repair had less to fix. Room does help a little, and spreading helps a little, but neither closes the gap.

Fourteen square micrometres separate the loosest floorplan from the tightest, which is two percent, and the ranking is the opposite of what the knob sounds like it does: the loose run is the largest, because longer wires made repair work harder. Utilization sets how much empty space surrounds the cells, not how many cells there are, and all three floorplans reach the same 0.44 nanosecond floor. The fourth option is the only one that really moves the area, and it moves it the wrong way. Optimizing for delay gives 870 square micrometres from 382 instances, 21 percent more silicon out of a quarter fewer cells, because the ones it chose are much larger. It is also slower once placed and routed, at 0.57 against 0.44, and it stops closing. The lever that changes cell area is synthesis, and on this block it was already set the right way round.

Spreading the design does relieve the pressure, cutting the routing resource in use from 58 to 39 percent, and it still does not stop either complaint: global routing runs its extra iterations anyway and the placer still reports that it could not reach the target. It also pays for what it does with 4 percent more wire, because everything is further apart. Two more layers clear both reports while the wire gets shorter, because the router can go up and over instead of around. When the constraint is capacity, giving capacity back is the cheap answer, and moving cells is what you do when you cannot.

Restoring the grid is the direct fix and the best one, and it costs nothing measurable in power, area or wire. Halving the frequency gets almost the same drop by a different route: half the switching is half the current, and it is a lot to give up for a tie. Spreading the design out makes it slightly worse rather than better, because the current then travels further through straps that are already too thin, and it pays 12 percent more wire for the privilege. When the metal is the problem, only metal fixes it.

Only the clock moves the number, and even it does not close the block. Thirty more picoseconds leaves it 12.80 short, because the interface budget is a fifth of the period and grew with it: the path between the two flip-flops now passes with 1.34 picoseconds to spare, and the worst path becomes a flip-flop to an output port. Room makes it slightly worse, since spreading the cells lengthens the wires, 858 micrometres against 778. The extra optimization pass changes nothing at all, down to the same 331.69 picosecond floor and one micrometre of wire. Fifteen cells in a row is a synthesis result, and no floorplan knob removes a gate.

Room helps, and then it stops helping. Going from a 38 percent target to 25 takes the finished density from 92 percent to 60 and buys 0.13 nanoseconds. Going twice as far gives back less, not more: 0.07 nanoseconds instead of 0.13, on a block now spread thin enough that the wires cost more than the crowding did. The optimum is in the middle and neither end finds it, which is the argument for sweeping a knob rather than reasoning about which way it points. Worth noticing too what the target actually means: it is applied to the area synthesis produced, and repair then adds to that, which is how a request for 38 percent finishes at 92.

Full effort and a tenth of the effort reach exactly the same worst slack, and the tenth gets there with 82 square micrometres less cell area, 13 percent less wire and 11 percent less power. The total negative slack is the part worth staring at: working on every violating endpoint left a larger total than working on the worst tenth. These three runs do not explain why, and the useful habit is not to assume they would. Going down to one percent finally costs something real, 0.01 nanoseconds of worst slack, which is where this particular curve stops being free.

Everything here routes. Both restricted runs finished with zero violations and still closed their timing, so whether it fits was never the question. What it costs is. Losing the upper layers adds 20 percent to the wire, 9 percent to the power, and takes the worst voltage drop from 0.83 percent of the supply to 1.38, because more wire is more capacitance and more capacitance is more current. Spreading the design out does relieve the routing, from 66 percent of the resource down to 50, and brings the drop back to 0.85. It pays with more wire than either other option, 29 percent above the ten-layer run, and it still does not stop the flow reporting congestion. So the ranking is the same as on the small block, and the difference at this size is that second best now arrives with a bill.

Halving the halo is worth having. It frees 5400 square micrometres of floorplan, shortens the wire by 4 percent, and takes the total negative slack from -47.93 to -37.27 nanoseconds, because cells that were pushed away from the macros can now sit where their connections are. Cutting it to nothing undoes all of that and more: the wire goes back up, the worst slack becomes the worst of the three, and the total negative slack nearly doubles against the halved run. With no room at the macro edge, every pin on those macros has to be reached through a strip that is now full of cells, and the ground bounce under them goes from 1.38 percent to 2.75. The knob has an optimum and it is not at either end, which is the only reliable thing anyone can tell you about a halo.

The first thing to take from this is that the floor moved. A run that was asked for 2.2 reported 2.18 as the smallest period it could reach, and the same design asked for 2.0 reached 2.05. That number is not a property of the design. It is a measure of how hard the tools were pushed, and reading it as a limit will cost you performance you could have had. The second thing is where it stops. Asking for 1.8 gets 2.06, no better than asking for 2.0, and charges 7 percent more cell area and 31 percent more power for the attempt, with a total negative slack of -279 nanoseconds where the 2.0 run had -9.35. The block runs at about 2.05 and no request changes that.

The hold margin is free, and the reason is in the starting numbers: the block already had 0.11 nanoseconds of hold slack, so asking for 0.10 gave repair nothing to fix. It reported no hold violations and changed no cell. Setup is the other way round. With 0.02 of slack, asking for 0.05 sends repair to work on every path in between, and it costs 26 percent more cell area and 31 percent more power. Tightening the clock is the same idea taken further, and on this block it costs more still and fails to close. A margin costs nothing until it is larger than the slack you already have, and then it costs a great deal.

The routability pass ran in the default flow and did nothing: switching it off gives a result identical to the last micrometre, because a block using a fifth of its routing resource has no congestion for it to relieve. The timing-driven pass was doing work. Without it the block came out 3 percent larger with 2 percent more wire, and timing still closed, so on this block the pass was buying area rather than slack. Switching off both is exactly the same as switching off the timing pass alone, which says the same thing a second way.

Square wins, by 4 percent over wide and 7 percent over tall. Among rectangles of the same area a square has the shortest average distance between two points in it, and stretching the block lengthens the nets that run along its long side. The two stretched shapes do not cost the same, and the voltage drop moves in opposite directions, 0.32 percent in the tall block and 0.52 in the wide one, a reminder that a block is not symmetric: its routing layers alternate direction and its supply straps run one way. Timing barely notices either shape.

The comment was right. With the adders mapped the block is 30 percent larger, its floor goes from 0.44 nanoseconds to 0.59, and it stops closing. Synthesising for speed on top makes the timing worse again, at 0.67. The power is the number that should stop anyone: 7.41 milliwatts against 2.62, nearly three times, for a block doing the same arithmetic. These runs do not say why, only that a mapping meant to help arithmetic-heavy designs does the opposite on this one. Leaving it off is the only option that keeps what the block already had.

All three end at the same worst slack, so the question is what each spent getting there. Without cloning the block is 64 square micrometres smaller, 7 percent, and its total negative slack is better rather than worse. Cloning was buying area and giving nothing back on this block. Switching off pin swapping also saves area, 30 square micrometres, but leaves the worst total negative slack of the three, so it is a smaller saving that costs something. The transform to question first is the one that adds cells.

Giving back half of the budget closes the block with 9.24 picoseconds in hand, a swing of 22 picoseconds from a change that touched no cell. The port path is still the worst one at that point, just passing now, with the path between the flip-flops 13.68 picoseconds clear behind it. Giving back three quarters leaves the port path 22.58 clear, and the internal path, at 11.61, becomes the limit again, so the extra budget buys only 2.37 picoseconds. Which path binds changed with every step here, and the only way to know which one you are fighting is to look at the endpoint, not the number.

Same four choices as on the small block, same winner, and a completely different outcome, because here only one of them works. Putting the grid back takes the drop from 8.82 percent to 0.83. Halving the frequency halves the power and only halves the drop, leaving 4.37 percent, which is still a broken supply bought at the price of half the performance. Spreading the design leaves 7.42. And the thinning never bought what it was for: the routing resource in use fell from 29.04 percent to 28.66 and the wire got 130 micrometres shorter out of 262811. The trade that sounded like a trade was ten times the voltage drop for nothing.

An impossible target is not a harmless one. Asking for 1.10 grew the block 35 percent larger than asking for 3.0, and made it draw nearly four times the power, because repair kept upsizing and buffering paths it could never fix. What the chase bought is a floor of 2.56 instead of 2.66, a tenth of a nanosecond, which is the same effect the ibex situation shows: the reported floor moves with how hard the tools are pushed. Asking for 3.0 is the only one of the three that closes, and it is also the smallest and the coolest. A target should be something the block can meet, with a little room, because every picosecond it cannot meet is paid for in area.

Packing tighter saves 5 percent of the wire, and it is the first run in which the flow reports congestion: global routing had to run extra iterations to clear it. The worst drop rises by half as well, from 0.83 percent to 1.26, with more current in less area. Loosening avoids both and pays 11 percent more wire for it, and the drop still gets worse, because the current now travels further to the straps. The default sits between two failure modes and is the only option clear of both. On the small block this knob was close to irrelevant. On a real core it moves the wire by tens of thousands of micrometres in each direction.

Doubling the straps takes the drop from 6.9 percent to 2.38 and changes nothing else measurable: power, wire and timing all stay within a fraction of a percent. Halving the clock comes second, at 3.19, and gets there by removing more than half the power, which is a real achievement bought with half the performance. Spreading the design out is the worst fix of the three: 14 percent more wire for a drop still above 4 percent. The platform's grid is sized for a typical block, and a block drawing half a watt is not typical. When the drop is the problem, metal is the cheap answer, again.