Clock trees
Read the map, then answer. Some questions give you four readings to choose between, some show two maps and ask which is healthy, and some ask you to click the region itself. Keys 1 to 4 choose an option, a and b choose a map, and Enter moves on. Every answer is followed by a description of what the map shows and the numbers behind it. Progress is stored in this browser.
All 5 maps in this family, described
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What shape is this tree?gcd on Nangate45, the clock tree after synthesis of the tree
A single root entering from the left, splitting into four coloured branches, each one serving a quarter of the block: red at the top left, yellow at the top right, orange at the bottom left, green at the bottom right.
Bisecting the sink region and balancing the halves is what produces this shape, and the colours are the branches the tool built. A mesh would cover the block in a grid and cost far more power; a spine would show one heavy trunk. The structure is worth recognizing because it tells you immediately whether the tool balanced by region, which is what keeps skew low.
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Which tree would you rather have?the same design, two clock trees, drawn at the same scale
On the left, four short balanced branches, one per quarter of the block. On the right, two long branches wandering across the block, with more turns and longer runs between splits.
The right-hand run was told to place a buffer every micrometre, which sounds harmless and is not: it produced 7 buffers instead of 5, a minimum depth of 3 instead of 2, and 48 more square micrometres of cells. Depth costs variation, and every extra level is one more place for skew to accumulate. A knob that fights the tool usually loses.
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What decided which flip-flops share a colour?gcd on ASAP7 (Arizona State University 7 nanometre predictive process design kit), the clock tree drawn on the cells it feeds
A magenta wire enters from the clock pin on the left edge and runs to the middle of the core, where the tree splits into four coloured branches: yellow over the top left, red over the top right, orange over the bottom left, green over the bottom right. Each branch ends on the flip-flops under it.
Clock tree synthesis groups sinks by position, because the cost it is trying to hold down is wire, and wire is distance. Four quadrants of flip-flops get four buffers sitting near the middle of each quadrant. The names confirm the shape: one root buffer at the pin and four leaf buffers, five in all, feeding 34 sinks, and the tree came out with 3.30 picoseconds of setup skew. Nothing about the logic entered into it. Two flip-flops in the same byte of the same register land on different colours if they were placed apart.
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The placement view of this block has cells everywhere. Why is this one full of holes?tinyRocket on Nangate45, the clock net drawn with the cells it reaches
Thousands of small boxes scattered across the core, wired together in red, green and yellow, with several large black voids between them and the two macros outlined at the bottom.
This block has 3913 sequential cells out of 27315 instances, so about one cell in seven is drawn here and the voids are solid combinational logic. Two things are worth taking from that. A clock view is not a floorplan and reading it as one will have you hunting for empty space that is not empty. And the tree that feeds those 3913 sinks needed 621 buffers of its own, cells that exist only to carry the clock and that burn power on every edge whether the logic does anything or not.
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The clock needs 0.30 nanoseconds to get from the pin to a flip-flop, a quarter of the 1.2 nanosecond period. What does that cost a path from one of those flip-flops to another?tinyRocket on Nangate45, the whole clock tree drawn on the block it feeds
A red mesh of clock wiring covering the entire core, thousands of small cells hanging off it, with one branch picked out in orange running from the clock pin at the top left down to the bottom right.
Insertion delay is common to the launch and the capture flip-flop, so on a path between two of them it subtracts out and only the difference between the two arrivals, the skew, is left. That is the arithmetic, and it is why a deep tree does not obviously hurt. What it does cost is everything that has nothing to cancel against. A path to or from a port is measured against the port, which waits for nobody. A reset release is checked against a clock edge that arrived late. And a longer chain of buffers has more places for variation to accumulate, so the skew you budgeted grows with the depth you allowed. Shallow trees are not about the delay. They are about everything that does not cancel.