Games / Log forensics / Files and configuration

Files and configuration

Each case shows the tail of a real run, ending where the tool stopped or warned. Say what caused it, or what to do about it. A case you miss returns later in the round and starts its schedule over; one you get right returns after 1, 3, 7, then 21 days. Keys 1 to 4 choose an option, h shows a hint, and Enter moves on. Progress is stored in this browser.

SourceEach case is the tail of a real run of the gcd design on Nangate45 in the openroad/orfs container, with one thing wrong. The same failures happen on commercial tools in different words: what carries across is the reasoning from the last few lines back to the cause. Reference: the OpenROAD documentation (OpenROAD-flow-scripts on GitHub).

All 8 cases in this stage, with answers

The run stopped here, one second in. What is the cause?
1_1_yosys_canonicalize log
```
make: *** No rule to make target '/nonexistent/none.lib', needed by 'results/nangate45/gcd/bad_lib/1_1_yosys_canonicalize.rtlil'.  Stop.
```
A file the flow was told to read does not exist.

Hint: Read what make says it was trying to build, and what needed it.

Make treats every input as either a file on disk or something it knows how to build. A path that is neither produces this message, and it names both the missing path and the thing that wanted it. The stage named is not at fault: it is simply the first one that needed the file.
```
LIB_FILES = $(PLATFORM_DIR)/lib/NangateOpenCellLibrary_typical.lib
```

Synthesis finished and then the run stopped. What happened?

1_synth log

Time spent: 47% 1x abc (0 sec), 8% 21x opt_clean (0 sec), ...
Elapsed time: 0:00.33[h:]min:sec. CPU time: user 0.28 sys 0.05 (99%). Peak memory: 45056KB.
Log                       Ext     Elapsed/s Peak Memory/MB sha1sum result [0:20)
1_2_yosys                 .v              0             44 756ad24f74de658d5044
cp /OpenROAD-flow-scripts/flow/designs/nangate45/gcd/constraint.sdc ./results/nangate45/gcd/bad_techlef/1_2_yosys.sdc
make: *** No rule to make target '/nonexistent/none.tech.lef', needed by 'results/nangate45/gcd/bad_techlef/1_synth.odb'.  Stop.

The technology file the next stage needs is missing.

Hint: Compare the stage that finished with the file make was looking for.

Synthesis completed: its statistics and its output file are in the log above the error. The failure belongs to the step that turns that netlist into a database, which needs the layers and sites the technology file defines. A missing input is reported when it is first needed, not when it was configured, which is why the stage that stops is rarely the culprit.

TECH_LEF = $(PLATFORM_DIR)/lef/NangateOpenCellLibrary.tech.lef

What is the cause, and what does it say about the configuration?
2_1_floorplan log
```
==========================================================================
Floorplan check_setup
--------------------------------------------------------------------------
number instances in verilog is 521
[INFO IFP-0107] Defining die area using utilization: 55.00% and aspect ratio: 1.
[ERROR IFP-0018] Unable to find site: NOSUCHSITE
Error: floorplan.tcl, 91 IFP-0018
Elapsed time: 0:00.24[h:]min:sec. CPU time: user 0.21 sys 0.04 (104%). Peak memory: 114796KB.
```
The site the rows are built from is not defined in the technology file.

Hint: The message names something it looked for. Where would that be defined?

A site is the unit cell of a placement row, and the floorplan needs one by name before it can build rows at all. The name comes from the platform configuration and has to match a SITE in the technology file exactly. The line above shows the die area was already worked out, so everything before this was fine.
```
PLACE_SITE = FreePDK45_38x28_10R_NP_162NW_34O
```
The mapper failed with a status code and nothing else. What do you do?
1_2_yosys log
```
10. Executing ABC pass (technology mapping using ABC).
10.1. Extracting gate netlist of module `\gcd' to `<abc-temp-dir>/input.blif'..
ERROR: ABC failed with status 8B
Elapsed time: 0:00.37[h:]min:sec. CPU time: user 0.24 sys 0.06 (81%). Peak memory: 42496KB.
make[1]: *** [Makefile:266: do-yosys] Error 1
make: *** [Makefile:277: results/nangate45/gcd/no_buffers/1_2_yosys.v] Error 2
```
Read the command above it, which lists what was excluded.

Hint: The tool says nothing useful, so read the line that invoked it.

A bare status code carries no information, so the next move is to read what the tool was asked to do. The command line here excludes every buffer and clock buffer in the library, which leaves the mapper unable to finish. Passes before it completed normally, so the netlist itself is fine. Reading the invocation is the habit worth keeping.
```
# keep the buffers the mapper and every later stage need
export DONT_USE_CELLS = AOI211_X1 OAI211_X1
```
The design's files have not moved. Why is this path being looked for?
1_1_yosys_canonicalize log
```
make: *** No rule to make target '/OpenROAD-flow-scripts/flow/designs/src/not_gcd/gcd.v', needed by 'results/nangate45/not_gcd/wrong_top/1_1_yosys_canonicalize.rtlil'.  Stop.
```
The design's name is used to build the path, and it is wrong.

Hint: Compare the directory in the path with the design you meant to run.

The same message as a missing library, from a different cause. The name is substituted into the source directory, the results directory, and the top module, so one typo makes the flow look in a directory that never existed. Reading which part of the path looks wrong is faster than checking whether the file is there.
```
export DESIGN_NAME = gcd
```
The grid could not be built. What was it asked for?
2_4_floorplan_pdn log
```
[ERROR PDN-1023] Unable to find metalX layer.
Error: pdn.tcl, 6 PDN-1023
Elapsed time: 0:00.22[h:]min:sec. CPU time: user 0.19 sys 0.03 (100%). Peak memory: 114348KB.
make[1]: *** [Makefile:429: do-2_4_floorplan_pdn] Error 1
make: *** [Makefile:429: results/nangate45/gcd/bad_pdn/2_4_floorplan_pdn.odb] Error 2
```
A layer the technology file does not define.

Hint: The layer it names is not one the technology has.

The grid definition names the layers its straps and rings are drawn on, and those names have to exist in the technology file. It is the usual failure when a grid written for one platform is pointed at another, since every process names its metals differently.
```
# name layers this technology actually has
add_pdn_stripe -layer metal7 -width 1.4 -pitch 40 -offset 2
```
Only one variable was changed, to route on fewer layers. What broke?
2_1_floorplan log
```
source /OpenROAD-flow-scripts/flow/platforms/nangate45/fastroute.tcl
[ERROR ODB-0137] In argument -clock_layers, min routing layer is greater than max routing layer.
Error: floorplan.tcl, 111 ODB-0137
Elapsed time: 0:00.23[h:]min:sec. CPU time: user 0.21 sys 0.05 (109%). Peak memory: 116372KB.
make[1]: *** [Makefile:415: do-2_1_floorplan] Error 1
make: *** [Makefile:415: results/nangate45/gcd/few_layers/2_1_floorplan.odb] Error 2
```
The clock's lowest layer is now above the highest layer allowed.

Hint: Two limits are being compared. One of them was not changed with the other.

A platform routes its clocks on upper layers on purpose, so it sets a minimum layer for them. Lower the maximum for the whole design and the two settings cross, which the floorplan catches before anything is built. Retargeting a design to a thinner stack means moving both limits.
```
export MAX_ROUTING_LAYER = metal3
export MIN_CLK_ROUTING_LAYER = metal3
```
Put these messages in the order a run prints them.
1. [INFO ODB-0227] LEF file: ... created 22 layers, 27 vias
2. [INFO IFP-0001] Added 24 rows of 182 site FreePDK45
3. [INFO CTS-0008] TritonCTS found 1 clock nets.
4. [INFO DRT-0199] Number of violations = 0.
5. [INFO RCX-0045] Extract 648 nets, 2366 rsegs
Hint: The three letters before the number name the tool that printed it.

The prefix is the module: reading the technology, initializing the floorplan, building the clock tree, detailed routing, and extraction. Knowing them turns a wall of output into a map, and it is how you find the right log without reading any of them. The full list is in the tool's documentation, and the codes are stable across versions.