Games / Log forensics / Floorplan and placement

Floorplan and placement

Each case shows the tail of a real run, ending where the tool stopped or warned. Say what caused it, or what to do about it. A case you miss returns later in the round and starts its schedule over; one you get right returns after 1, 3, 7, then 21 days. Keys 1 to 4 choose an option, h shows a hint, and Enter moves on. Progress is stored in this browser.

SourceEach case is the tail of a real run of the gcd design on Nangate45 in the openroad/orfs container, with one thing wrong. The same failures happen on commercial tools in different words: what carries across is the reasoning from the last few lines back to the cause. Reference: the OpenROAD documentation (OpenROAD-flow-scripts on GitHub).
All 4 cases in this stage, with answers
  • Placement failed on three instances. What is the real cause?
    5_1_grt log
    global_route -start_incremental
    detailed_placement
    [INFO DPL-0006] Core area: 1161.89 um^2, Instances area: 1143.27 um^2, Utilization: 98.4%
    [INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically.
    [INFO DPL-1101] Legalizing using diamond search.
    Movements Summary
    ---------------------------------------
    Total cells:                     730
    Diamond Move Success:            727 ( 99.59%)
    Diamond Move Failure:              3
    Rip-up and replace Success:        0 (  0.00% of diamond failures)
    Rip-up and replace Failure:        3
    Total Placement Failures:          3
    ---------------------------------------
    [INFO DPL-0034] Detailed placement failed on the following 3 instances:
    [INFO DPL-0035]  dpath.a_reg.out[0]$_DFFE_PP_
    [INFO DPL-0035]  rebuffer312
    [INFO DPL-0035]  dpath.b_reg.out[0]$_DFFE_PP_
    [ERROR DPL-0036] Detailed placement failed inside DPL.
    Error: global_route.tcl, 150 DPL-0036
    Elapsed time: 0:27.08[h:]min:sec. CPU time: user 419.61 sys 0.93 (1552%). Peak memory: 294840KB.
    make[1]: *** [Makefile:548: do-5_1_grt] Error 1
    make: *** [Makefile:548: results/nangate45/gcd/fast_clock/5_1_grt.odb] Error 2
    Timing repair grew the netlist until the rows were full.

    Hint: Compare the utilization here with the 55 percent the floorplan was built for.

    The rows were built for 55 percent utilization and this run is at 98.4 percent, against about 61 percent on a healthy run of the same design. Nothing added that area except repair, which buffers and upsizes until it meets the constraint or runs out of room. The three instances named are where it finally failed, not why. Follow the utilization back through the log and the cause is a clock period nothing could meet.

    # either give repair a reachable target
    create_clock -name core_clock -period 0.46 [get_ports clk]
    # or give it room to work in
    export CORE_UTILIZATION = 40
  • Placement stopped before it started. What does this mean?
    3_1_place_gp_skip_io log
    read_sdc ./results/nangate45/gcd/tiny_die/2_floorplan.sdc
    source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl
    [INFO GPL-0022] Initialize gpl and calculate uniform density.
    [ERROR FLW-0024] Place density exceeds 1.0 (current PLACE_DENSITY_LB_ADDON =  0.20). Please check if the value of  PLACE_DENSITY_LB_ADDON is between 0 and 0.99.
    Error: global_place_skip_io.tcl, 19 FLW-0024
    Elapsed time: 0:00.43[h:]min:sec. CPU time: user 4.28 sys 0.04 (1013%). Peak memory: 116140KB.
    make[1]: *** [Makefile:458: do-3_1_place_gp_skip_io] Error 1
    make: *** [Makefile:458: results/nangate45/gcd/tiny_die/3_1_place_gp_skip_io.odb] Error 2
    The target density works out above one, which is not a thing.

    Hint: The number it complains about is computed, not something you set directly.

    The placer works to a density target built from the design's utilization plus an allowance. Ask for 95 percent utilization and add the allowance and the target passes one, meaning the cells would have to overlap. The run stops before placing anything, which is the useful behaviour: the floorplan is what needs changing.

    export CORE_UTILIZATION = 55
    export PLACE_DENSITY_LB_ADDON = 0.20
  • This run closed with room to spare. What did the spare room cost?
    6_report log
    [INFO IFP-0100] Die BBox:  (  0.000  0.000 ) ( 93.045 93.045 ) um
    [INFO IFP-0101] Core BBox: (  1.140  1.400 ) ( 91.960 91.000 ) um
    [INFO IFP-0102] Core area:                         8137.472 um^2
    [INFO IFP-0103] Total instances area:               663.138 um^2
    [INFO IFP-0104] Effective utilization:                0.081
    [INFO IFP-0105] Number of instances:                    521
            ...
    Total wire length = 6098 um.
    Design area 767 um^2 9% utilization.
    Longer wires, and the buffers repair added to drive them.

    Hint: Compare the wire length and the area with a run of the same design at 57 percent.

    The same netlist at 57 percent utilization routes 3605 micrometres of wire and finishes at 716 square micrometres of cells. Here the core is seven times larger, the wire length is 6098, and the cell area has grown to 767 because timing repair had to drive those longer wires. Too much room is a real cost, not just a wasted one.

    export CORE_UTILIZATION = 55
  • Pin placement stopped. What was it told to do?
    3_2_place_iop log
    Found 0 macro blocks.
    Using 2 tracks default min distance between IO pins.
    [ERROR PPL-0051] Layer metalX not found.
    Error: io_placement.tcl, 21 PPL-0051
    Elapsed time: 0:00.21[h:]min:sec. CPU time: user 0.17 sys 0.04 (100%). Peak memory: 113920KB.
    make[1]: *** [Makefile:460: do-3_2_place_iop] Error 1
    make: *** [Makefile:460: results/nangate45/gcd/bad_pins/3_2_place_iop.odb] Error 2
    Place the ports on layers the technology does not have.

    Hint: The command is printed above the error, with both of its arguments.

    The port placer is told which layers to use for horizontal and vertical pins, and it checks the names against the technology. The choice matters beyond spelling: a layer too low makes the pins hard for the router to reach, and one too high wastes the upper stack. Both names here are simply wrong, which the tool says plainly.

    export IO_PLACER_H = metal3
    export IO_PLACER_V = metal2