Games / Command flash cards / Timing reports / Clock reports

Clock reports

The cards come in more than one shape: a command to explain, and a description whose command you name. A missed card returns later in the round and starts the schedule over. A card answered correctly moves up the schedule and next appears after 1, 3, 7, then 21 days. Keys 1 to 4 choose an option, h shows a hint, and Enter moves on. A hint keeps the card where it is on the schedule. An ordering card is answered by clicking its items in order, and one wrong click ends it. Time values are in nanoseconds. Progress is stored in this browser.

SourceThese cards follow the reporting commands of OpenSTA, the open-source static timing analyzer used by OpenROAD, and each answer links to that command in the OpenSTA command reference. Report commands are not a standard: other timers name and format their reports differently. The report excerpts are real OpenSTA output from the gcd example design. Reference: OpenSTA command reference (OpenSTA on GitHub).
All 5 cards in this section, with answers
  • report_clock_skew
    Reports the largest clock-arrival difference between registers that share a path.

    Hint: Skew matters only between registers with a path between them, so ask which pairs are compared.

    Skew only matters between registers connected by a timing path, so only those pairs are compared. -setup and -hold choose which check's view of skew to report. OpenSTA reference

  • report_clock_latency
    Reports the delay from each clock's source to its registers.

    Hint: Latency is the delay from a clock's source to where the clock is used.

    With propagated clocks this is the computed delay through the built clock tree; with ideal clocks it reflects the latency set in the constraints. OpenSTA reference

  • report_clock_min_period
    Reports the smallest period each clock could run at.

    Hint: Ask what the smallest period is that the paths in the design would still meet.

    It also prints the matching highest frequency. It is found from the worst register-to-register paths on the same clock edge. Paths between clocks or edges, latch paths, and paths with multicycle or maximum-delay exceptions are ignored. OpenSTA reference

  • report_clock_properties
    Lists every defined clock with its period and edge times.

    Hint: Properties here means how each clock was defined, not what was measured on it.

    It is a quick check that the clocks were defined as intended, before any path is examined. OpenSTA reference

  • A path is failing and you suspect the clock reaches its two registers at different times. You want that difference, for the register pairs that share a path.
    report_clock_skew

    Hint: Two of these describe the clock network, but only one compares two ends of a path.

    Latency is how long the clock takes to reach one register, which largely cancels within a clock. Skew is the difference between two of them on the same path, which does not cancel and is what eats the budget. OpenSTA reference