ASAP7: the Predictive 7 nm PDK (Process Design Kit)
The idea
Advanced-node PDKs (Process Design Kits) are secret, so research and teaching on advanced-node physical design had no realistic target. ASAP7 (Arizona State University 7 nm predictive PDK (Process Design Kit)), released in 2016 by Arizona State University with ARM, is a predictive kit: a process that does not exist at any foundry, designed to have the structure and rules of a plausible 7 nm FinFET node.
- Devices: FinFET, with drive strength in fin counts; the standard-cell libraries come in fin-count variants and threshold flavours, exactly the quantized structure of real FinFET libraries.
- Lithography assumptions: EUV (Extreme Ultraviolet) single exposure on the critical lower layers, so its rules avoid LELE (Litho-Etch-Litho-Etch) (Litho-Etch-Litho-Etch) coloring; a 7.5-track cell height.
- Metal stack: 9 metal layers with realistic pitches, thin lower layers and thick upper ones.
- Complete kit: LEF (Library Exchange Format), Liberty at several corners, DRC (Design Rule Check) and LVS (Layout Versus Schematic) decks for open tools, SPICE (Simulation Program with Integrated Circuit Emphasis) models, and parasitic tables.
It is the platform on which the fin-quantized library structure, the sub-10-track cell, the deep stack, and advanced-node routing behaviour (pin access above all) can be studied with open tools.
What it is not
Not manufacturable: no fab implements it, so no chip results. Its rules are simplified relative to any real 7 nm kit, and its models are predictive rather than measured. Results on ASAP7 (Arizona State University 7 nm predictive PDK (Process Design Kit)) show trends and structure, not absolute numbers a foundry would sign.
Pros, cons, and the trade-off
Strengths
- Only open advanced-node structure: FinFET libraries, deep stack, fine pitches, all inspectable.
- Complete enough for the full flow: OpenROAD runs RTL (Register Transfer Level) to GDSII (Graphic Design System II) on it.
- Common research baseline: widely used in publications, so results are comparable.
Weaknesses
- Not real: no silicon, and rule simplifications mean real-kit surprises are absent.
- Aging assumptions: a 2016 view of 7 nm; real nodes moved on.
- Library gaps: fewer cells and corners than production kits, and known DRC (Design Rule Check) deck limitations.
The trade-off
ASAP7 (Arizona State University 7 nm predictive PDK (Process Design Kit)) trades reality for access: it is the only way to see advanced-node physical design in the open, and everything learned on it must be read as structure and trend rather than as sign-off truth.
Where to start
- The ASAP7 repository and OpenROAD's asap7 platform, which runs the full flow on the kit's libraries.
- The original paper describes the assumptions behind every rule and is the right companion for reading the deck.