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The X Architecture: Diagonal Routing

Routing research global + detailed 2001-2006 the X Initiative (Teig; Toshiba, Cadence, and partners) the research direction that lost

The idea

Manhattan wiring pays |dx| + |dy| for every connection. Allow wires at 45 degrees and the same connection costs less:

octilinear length = |dx − dy| + min(dx, dy) × √2, versus Manhattan dx + dy

dx, dy the connection's horizontal and vertical spans
for a square connection (dx = dy) the saving is 1 − √2/2 ≈ 29 percent; averaged over real nets the X Initiative's studies claimed around 20 percent wirelength, with matching delay and power

The X architecture (announced 2001 by a consortium around Simplex's Steve Teig, with Toshiba and Cadence among the members) proposed exactly this: keep the lower layers Manhattan, and run the upper routing layers at 45 degrees. Chips were actually fabricated; the geometry and the routers worked.

Why it lost

Nothing in the mathematics failed. Everything around it did:

Lithography, masks, and OPC (Optical Proximity Correction) were built and tuned for two orthogonal directions; diagonal features printed worse and cost more at exactly the time subwavelength printing was getting hard.
Vias between diagonal and Manhattan layers, and the enclosure rules around them, were awkward and area-hungry.
Every router, extractor, DRC (Design Rule Check) deck, library, and downstream tool assumed rectilinear geometry; the whole ecosystem had to change at once for one benefit.

By the mid-2000s the initiative faded. The lesson generalizes and is worth carrying: in physical design, a real 20 percent improvement loses to the cost of changing everything simultaneously. The ecosystem outweighs the geometry.

Watch it work: the saving, then the reasons it was dropped

The Manhattan route, the octilinear route with the saving computed from the drawn spans, and the reasons it died.

Pros, cons, and the trade-off

Strengths

Provable wirelength saving: the reduction is a geometric fact, about 20 percent averaged over real nets.
Demonstrated in silicon: octilinear routers were built and chips were fabricated with diagonal layers.
Industrial backing: the effort was a consortium of established companies, not a single research group.

Weaknesses

Manufacturing: subwavelength lithography favors two orthogonal directions, and later nodes tightened that preference (multi-patterning and SADP (Self-Aligned Double Patterning) are one-directional by construction).
Layer interfaces: vias and spacing rules between diagonal and Manhattan layers consumed part of the wirelength saving.
Ecosystem cost: every router, extractor, library, and rule deck assumed rectilinear geometry, so the cost of changing all of them exceeded the benefit.

The trade-off

A routing improvement is adopted only if its benefit exceeds the cost of changing the tools and process around it. The X architecture offered a real 20 percent wirelength reduction, but required the lithography, the via rules, and the entire tool flow to change at once, and that cost was higher than the saving. Later nodes moved in the opposite direction, toward stricter one-directional layers.

Is it actually used today?

The evidence for the X architecture is historical.

Then: consortium chips were fabricated in the early 2000s and octilinear routing tools existed commercially for a time.
Now: no production process offers diagonal routing layers; advanced-node lithography (multi-patterning, SADP (Self-Aligned Double Patterning)) moved layers toward stricter one-directional geometry, the opposite direction.
The residue: octilinear Steiner trees survive in the research literature, and the episode survives as the standard cautionary example in routing courses.