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Useful Skew and Clock Scheduling

Clock Tree Synthesis research 1990 Fishburn skew as an asset verification complexity

The idea

A path from flip-flop A to flip-flop B must fit its logic delay between A's launch edge and B's capture edge. If the clock reaches B a little late, the path gains exactly that much time; the price is paid by paths leaving B, which lose the same amount. Skew is therefore a budget to allocate rather than noise to eliminate. Fishburn formulated it: let t_i be each flop's clock arrival offset. With T the clock period, every setup constraint becomes

t_j − t_i ≥ delay_max(i→j) − T + setup

and every hold constraint becomes

t_i − t_j ≥ hold − delay_min(i→j)
  • t_i, t_j clock arrival offsets at the launching and capturing flip-flops
  • T the clock period being minimized
  • delay_max/min slowest and fastest path delay from flop i to flop j
  • setup, hold the capturing flip-flop's timing requirements

Minimizing T subject to these difference constraints is a linear program, and pure feasibility questions reduce to shortest-path computations on the constraint graph (negative cycle means infeasible). The optimal schedule can cut the period below what zero skew permits, bounded by the mean cycle delay around the worst loop.

From schedule to silicon

Computing offsets is the easy half; implementing them means the clock tree must deliver prescribed non-zero skews: bounded-skew and prescribed-skew extensions of Deferred-Merge Embedding, or explicit delay insertion near specific flops. Modern tools apply the idea locally and conservatively (concurrent clock and data optimization): nudge arrivals at flops on critical paths, within tight windows, re-verifying hold everywhere, because aggressive schedules multiply verification corners and variation risk.

Where you meet it today

As 'useful skew' options in every commercial flow, in clock-and-datapath co-optimization steps, and in interview questions about why zero skew is not the objective, merely the safe default.

References and further reading