mkdir -p results/nangate45/ibex/ibex_m4_sp/ echo 2.2 > results/nangate45/ibex/ibex_m4_sp/clock_period.txt /OpenROAD-flow-scripts/flow/scripts/synth.sh /OpenROAD-flow-scripts/flow/scripts/synth_canonicalize.tcl ./logs/nangate45/ibex/ibex_m4_sp/1_1_yosys_canonicalize.log Using ABC speed script. Extracting clock period from SDC file: ./results/nangate45/ibex/ibex_m4_sp/clock_period.txt Setting clock period to 2.2 1. Executing Liberty frontend: /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib 2. Executing Liberty frontend: /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib 3. Executing SLANG frontend. 3.1. Executing UNDRIVEN pass. (resolve undriven signals) 3.2. Executing PROC_CLEAN pass (remove empty switches from decision trees). 3.3. Executing TRIBUF pass. 3.4. Executing PROC_RMDEAD pass (remove dead branches from decision trees). 3.5. Executing PROC_PRUNE pass (remove redundant assignments in processes). 3.6. Executing PROC_INIT pass (extract init attributes). 3.7. Executing PROC_ROM pass (convert switches to ROMs). 3.8. Executing PROC_MUX pass (convert decision trees to multiplexers). 3.9. Executing PROC_CLEAN pass (remove empty switches from decision trees). 3.10. Executing OPT_EXPR pass (perform const folding). 4. Executing HIERARCHY pass (managing design hierarchy). 4.1. Analyzing design hierarchy.. 4.2. Analyzing design hierarchy.. 5. Executing OPT_CLEAN pass (remove unused cells and wires). 6. Executing RTLIL backend. End of script. Logfile hash: 1298ed3370, time: 1.37s, user: 1.27s, system: 0.03s, MEM: 60.25 MB peak Yosys 0.64+post (git sha1 UNKNOWN-dirty, g++ 11.4.0-1ubuntu1~22.04.3 -fPIC -O3) Time spent: 86% 2x read_slang (1 sec), 5% 4x read_liberty (0 sec), ... Top level design units: ibex_core Build succeeded: 0 errors, 0 warnings Elapsed time: 0:01.38[h:]min:sec. CPU time: user 1.29 sys 0.04 (95%). Peak memory: 61696KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 1_1_yosys_canonicalize .rtlil 1 60 d62ca5e98a2d8d44c61d /OpenROAD-flow-scripts/flow/scripts/synth.sh /OpenROAD-flow-scripts/flow/scripts/synth.tcl ./logs/nangate45/ibex/ibex_m4_sp/1_2_yosys.log Using ABC speed script. Extracting clock period from SDC file: ./results/nangate45/ibex/ibex_m4_sp/clock_period.txt Setting clock period to 2.2 1. Executing RTLIL frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. 2.2. Analyzing design hierarchy.. 3. Executing SYNTH pass. 3.1. Executing HIERARCHY pass (managing design hierarchy). 3.1.1. Analyzing design hierarchy.. 3.1.2. Analyzing design hierarchy.. 3.2. Executing PROC pass (convert processes to netlists). 3.2.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). 3.2.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). 3.2.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). 3.2.4. Executing PROC_INIT pass (extract init attributes). 3.2.5. Executing PROC_ARST pass (detect async resets in processes). 3.2.6. Executing PROC_ROM pass (convert switches to ROMs). 3.2.7. Executing PROC_MUX pass (convert decision trees to multiplexers). 3.2.8. Executing PROC_DLATCH pass (convert process syncs to latches). 3.2.9. Executing PROC_DFF pass (convert process syncs to FFs). 3.2.10. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.2.11. Executing PROC_CLEAN pass (remove empty switches from decision trees). 3.2.12. Executing OPT_EXPR pass (perform const folding). 3.3. Executing FLATTEN pass (flatten design). 3.4. Executing OPT_EXPR pass (perform const folding). 3.5. Executing OPT_CLEAN pass (remove unused cells and wires). 3.6. Executing CHECK pass (checking for obvious problems). 3.7. Executing OPT pass (performing simple optimizations). 3.7.1. Executing OPT_EXPR pass (perform const folding). 3.7.2. Executing OPT_MERGE pass (detect identical cells). 3.7.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.7.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.7.5. Executing OPT_MERGE pass (detect identical cells). 3.7.6. Executing OPT_DFF pass (perform DFF optimizations). 3.7.7. Executing OPT_CLEAN pass (remove unused cells and wires). 3.7.8. Executing OPT_EXPR pass (perform const folding). 3.7.9. Rerunning OPT passes. (Maybe there is more to do..) 3.7.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.7.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.7.12. Executing OPT_MERGE pass (detect identical cells). 3.7.13. Executing OPT_DFF pass (perform DFF optimizations). 3.7.14. Executing OPT_CLEAN pass (remove unused cells and wires). 3.7.15. Executing OPT_EXPR pass (perform const folding). 3.7.16. Rerunning OPT passes. (Maybe there is more to do..) 3.7.17. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.7.18. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.7.19. Executing OPT_MERGE pass (detect identical cells). 3.7.20. Executing OPT_DFF pass (perform DFF optimizations). 3.7.21. Executing OPT_CLEAN pass (remove unused cells and wires). 3.7.22. Executing OPT_EXPR pass (perform const folding). 3.7.23. Finished fast OPT passes. (There is nothing left to do.) 3.8. Executing FSM pass (extract and optimize FSM). 3.8.1. Executing FSM_DETECT pass (finding FSMs in design). 3.8.2. Executing FSM_EXTRACT pass (extracting FSM from design). 3.8.3. Executing FSM_OPT pass (simple optimizations of FSMs). 3.8.4. Executing OPT_CLEAN pass (remove unused cells and wires). 3.8.5. Executing FSM_OPT pass (simple optimizations of FSMs). 3.8.6. Executing FSM_RECODE pass (re-assigning FSM state encoding). 3.8.7. Executing FSM_INFO pass (dumping all available information on FSM cells). 3.8.8. Executing FSM_MAP pass (mapping FSMs to basic logic). 3.9. Executing OPT pass (performing simple optimizations). 3.9.1. Executing OPT_EXPR pass (perform const folding). 3.9.2. Executing OPT_MERGE pass (detect identical cells). 3.9.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.9.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.9.5. Executing OPT_MERGE pass (detect identical cells). 3.9.6. Executing OPT_DFF pass (perform DFF optimizations). 3.9.7. Executing OPT_CLEAN pass (remove unused cells and wires). 3.9.8. Executing OPT_EXPR pass (perform const folding). 3.9.9. Rerunning OPT passes. (Maybe there is more to do..) 3.9.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.9.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.9.12. Executing OPT_MERGE pass (detect identical cells). 3.9.13. Executing OPT_DFF pass (perform DFF optimizations). 3.9.14. Executing OPT_CLEAN pass (remove unused cells and wires). 3.9.15. Executing OPT_EXPR pass (perform const folding). 3.9.16. Rerunning OPT passes. (Maybe there is more to do..) 3.9.17. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.9.18. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.9.19. Executing OPT_MERGE pass (detect identical cells). 3.9.20. Executing OPT_DFF pass (perform DFF optimizations). 3.9.21. Executing OPT_CLEAN pass (remove unused cells and wires). 3.9.22. Executing OPT_EXPR pass (perform const folding). 3.9.23. Rerunning OPT passes. (Maybe there is more to do..) 3.9.24. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.9.25. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.9.26. Executing OPT_MERGE pass (detect identical cells). 3.9.27. Executing OPT_DFF pass (perform DFF optimizations). 3.9.28. Executing OPT_CLEAN pass (remove unused cells and wires). 3.9.29. Executing OPT_EXPR pass (perform const folding). 3.9.30. Finished fast OPT passes. (There is nothing left to do.) 3.10. Executing WREDUCE pass (reducing word size of cells). 3.11. Executing PEEPOPT pass (run peephole optimizers). 3.12. Executing OPT_CLEAN pass (remove unused cells and wires). 3.13. Executing ALUMACC pass (create $alu and $macc cells). 3.14. Executing SHARE pass (SAT-based resource sharing). 3.15. Executing OPT pass (performing simple optimizations). 3.15.1. Executing OPT_EXPR pass (perform const folding). 3.15.2. Executing OPT_MERGE pass (detect identical cells). 3.15.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.15.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.15.5. Executing OPT_MERGE pass (detect identical cells). 3.15.6. Executing OPT_DFF pass (perform DFF optimizations). 3.15.7. Executing OPT_CLEAN pass (remove unused cells and wires). 3.15.8. Executing OPT_EXPR pass (perform const folding). 3.15.9. Rerunning OPT passes. (Maybe there is more to do..) 3.15.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 3.15.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 3.15.12. Executing OPT_MERGE pass (detect identical cells). 3.15.13. Executing OPT_DFF pass (perform DFF optimizations). 3.15.14. Executing OPT_CLEAN pass (remove unused cells and wires). 3.15.15. Executing OPT_EXPR pass (perform const folding). 3.15.16. Finished fast OPT passes. (There is nothing left to do.) 3.16. Executing MEMORY pass. 3.16.1. Executing OPT_MEM pass (optimize memories). 3.16.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations). 3.16.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths). 3.16.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs). 3.16.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd). 3.16.6. Executing OPT_CLEAN pass (remove unused cells and wires). 3.16.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells). 3.16.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide). 3.16.9. Executing OPT_CLEAN pass (remove unused cells and wires). 3.16.10. Executing MEMORY_COLLECT pass (generating $mem cells). 3.17. Executing OPT_CLEAN pass (remove unused cells and wires). 4. Executing SYNTH pass. 4.1. Executing OPT pass (performing simple optimizations). 4.1.1. Executing OPT_EXPR pass (perform const folding). 4.1.2. Executing OPT_MERGE pass (detect identical cells). 4.1.3. Executing OPT_DFF pass (perform DFF optimizations). 4.1.4. Executing OPT_CLEAN pass (remove unused cells and wires). 4.1.5. Finished fast OPT passes. 4.2. Executing MEMORY_MAP pass (converting memories to logic and flip-flops). 4.3. Executing OPT pass (performing simple optimizations). 4.3.1. Executing OPT_EXPR pass (perform const folding). 4.3.2. Executing OPT_MERGE pass (detect identical cells). 4.3.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 4.3.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 4.3.5. Executing OPT_MERGE pass (detect identical cells). 4.3.6. Executing OPT_SHARE pass. 4.3.7. Executing OPT_DFF pass (perform DFF optimizations). 4.3.8. Executing OPT_CLEAN pass (remove unused cells and wires). 4.3.9. Executing OPT_EXPR pass (perform const folding). 4.3.10. Rerunning OPT passes. (Maybe there is more to do..) 4.3.11. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 4.3.12. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 4.3.13. Executing OPT_MERGE pass (detect identical cells). 4.3.14. Executing OPT_SHARE pass. 4.3.15. Executing OPT_DFF pass (perform DFF optimizations). 4.3.16. Executing OPT_CLEAN pass (remove unused cells and wires). 4.3.17. Executing OPT_EXPR pass (perform const folding). 4.3.18. Rerunning OPT passes. (Maybe there is more to do..) 4.3.19. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 4.3.20. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 4.3.21. Executing OPT_MERGE pass (detect identical cells). 4.3.22. Executing OPT_SHARE pass. 4.3.23. Executing OPT_DFF pass (perform DFF optimizations). 4.3.24. Executing OPT_CLEAN pass (remove unused cells and wires). 4.3.25. Executing OPT_EXPR pass (perform const folding). 4.3.26. Rerunning OPT passes. (Maybe there is more to do..) 4.3.27. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 4.3.28. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 4.3.29. Executing OPT_MERGE pass (detect identical cells). 4.3.30. Executing OPT_SHARE pass. 4.3.31. Executing OPT_DFF pass (perform DFF optimizations). 4.3.32. Executing OPT_CLEAN pass (remove unused cells and wires). 4.3.33. Executing OPT_EXPR pass (perform const folding). 4.3.34. Rerunning OPT passes. (Maybe there is more to do..) 4.3.35. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 4.3.36. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 4.3.37. Executing OPT_MERGE pass (detect identical cells). 4.3.38. Executing OPT_SHARE pass. 4.3.39. Executing OPT_DFF pass (perform DFF optimizations). 4.3.40. Executing OPT_CLEAN pass (remove unused cells and wires). 4.3.41. Executing OPT_EXPR pass (perform const folding). 4.3.42. Finished fast OPT passes. (There is nothing left to do.) 4.4. Executing TECHMAP pass (map to technology primitives). 4.4.1. Executing Verilog-2005 frontend: /OpenROAD-flow-scripts/tools/install/yosys/bin/../share/yosys/techmap.v 4.4.2. Executing Verilog-2005 frontend: /OpenROAD-flow-scripts/flow/platforms/common/lcu_kogge_stone.v 4.4.3. Continuing TECHMAP pass. 4.5. Executing OPT pass (performing simple optimizations). 4.5.1. Executing OPT_EXPR pass (perform const folding). 4.5.2. Executing OPT_MERGE pass (detect identical cells). 4.5.3. Executing OPT_DFF pass (perform DFF optimizations). 4.5.4. Executing OPT_CLEAN pass (remove unused cells and wires). 4.5.5. Finished fast OPT passes. 4.6. Executing HIERARCHY pass (managing design hierarchy). 4.6.1. Analyzing design hierarchy.. 4.6.2. Analyzing design hierarchy.. 4.7. Printing statistics. 4.8. Executing CHECK pass (checking for obvious problems). 5. Executing OPT pass (performing simple optimizations). 5.1. Executing OPT_EXPR pass (perform const folding). 5.2. Executing OPT_MERGE pass (detect identical cells). 5.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 5.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 5.5. Executing OPT_MERGE pass (detect identical cells). 5.6. Executing OPT_DFF pass (perform DFF optimizations). 5.7. Executing OPT_CLEAN pass (remove unused cells and wires). 5.8. Executing OPT_EXPR pass (perform const folding). 5.9. Rerunning OPT passes. (Maybe there is more to do..) 5.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 5.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 5.12. Executing OPT_MERGE pass (detect identical cells). 5.13. Executing OPT_DFF pass (perform DFF optimizations). 5.14. Executing OPT_CLEAN pass (remove unused cells and wires). 5.15. Executing OPT_EXPR pass (perform const folding). 5.16. Finished fast OPT passes. (There is nothing left to do.) 6. Executing EXTRACT_FA pass (find and extract full/half adders). 7. Executing TECHMAP pass (map to technology primitives). 7.1. Executing Verilog-2005 frontend: /OpenROAD-flow-scripts/flow/platforms/nangate45/cells_adders.v 7.2. Continuing TECHMAP pass. 8. Executing TECHMAP pass (map to technology primitives). 8.1. Executing Verilog-2005 frontend: /OpenROAD-flow-scripts/tools/install/yosys/bin/../share/yosys/techmap.v 8.2. Continuing TECHMAP pass. 9. Executing OPT pass (performing simple optimizations). 9.1. Executing OPT_EXPR pass (perform const folding). 9.2. Executing OPT_MERGE pass (detect identical cells). 9.3. Executing OPT_DFF pass (perform DFF optimizations). 9.4. Executing OPT_CLEAN pass (remove unused cells and wires). 9.5. Finished fast OPT passes. 10. Executing TECHMAP pass (map to technology primitives). 10.1. Executing Verilog-2005 frontend: /OpenROAD-flow-scripts/flow/platforms/nangate45/cells_latch.v 10.2. Continuing TECHMAP pass. 11. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file). 11.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target). 12. Executing OPT pass (performing simple optimizations). 12.1. Executing OPT_EXPR pass (perform const folding). 12.2. Executing OPT_MERGE pass (detect identical cells). 12.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 12.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 12.5. Executing OPT_MERGE pass (detect identical cells). 12.6. Executing OPT_DFF pass (perform DFF optimizations). 12.7. Executing OPT_CLEAN pass (remove unused cells and wires). 12.8. Executing OPT_EXPR pass (perform const folding). 12.9. Rerunning OPT passes. (Maybe there is more to do..) 12.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). 12.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). 12.12. Executing OPT_MERGE pass (detect identical cells). 12.13. Executing OPT_DFF pass (perform DFF optimizations). 12.14. Executing OPT_CLEAN pass (remove unused cells and wires). 12.15. Executing OPT_EXPR pass (perform const folding). 12.16. Finished fast OPT passes. (There is nothing left to do.) 13. Executing SETUNDEF pass (replace undef values with defined constants). abc -script /OpenROAD-flow-scripts/flow/scripts/abc_speed.script -liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib -dont_use TAPCELL_X1 -dont_use FILLCELL_X1 -dont_use AOI211_X1 -dont_use OAI211_X1 -constr ./objects/nangate45/ibex/ibex_m4_sp/abc.constr -D 2.2 14. Executing ABC pass (technology mapping using ABC). 14.1. Extracting gate netlist of module `\ibex_core' to `/input.blif'.. 14.1.1. Executed ABC. 14.1.2. Re-integrating ABC results. Took 39 seconds: abc -script /OpenROAD-flow-scripts/flow/scripts/abc_speed.script -liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib -dont_use TAPCELL_X1 -dont_use FILLCELL_X1 -dont_use AOI211_X1 -dont_use OAI211_X1 -constr ./objects/nangate45/ibex/ibex_m4_sp/abc.constr -D 2.2 15. Executing SPLITNETS pass (splitting up multi-bit signals). 16. Executing OPT_CLEAN pass (remove unused cells and wires). 17. Executing HILOMAP pass (mapping to constant drivers). 18. Executing INSBUF pass (insert buffer cells for connected wires). 19. Executing CHECK pass (checking for obvious problems). 20. Printing statistics. 21. Executing CHECK pass (checking for obvious problems). 22. Executing Verilog backend. 22.1. Executing BMUXMAP pass. 22.2. Executing DEMUXMAP pass. exec cp /OpenROAD-flow-scripts/flow/designs/nangate45/ibex/constraint.sdc ./results/nangate45/ibex/ibex_m4_sp/1_synth.sdc End of script. Logfile hash: cf109ad6e2, time: 53.32s, user: 14.05s, system: 0.24s, MEM: 108.18 MB peak Yosys 0.64+post (git sha1 UNKNOWN-dirty, g++ 11.4.0-1ubuntu1~22.04.3 -fPIC -O3) Time spent: 73% 1x abc (38 sec), 15% 1x extract_fa (8 sec), ... Elapsed time: 0:53.39[h:]min:sec. CPU time: user 52.27 sys 0.29 (98%). Peak memory: 110772KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 1_2_yosys .v 53 108 b84ec8ca456cbad0a509 cp /OpenROAD-flow-scripts/flow/designs/nangate45/ibex/constraint.sdc ./results/nangate45/ibex/ibex_m4_sp/1_2_yosys.sdc OpenROAD 26Q3-173-gf5df0085c2 Features included (+) or not (-): +GPU +GUI +Python This program is licensed under the BSD-3 license. See the LICENSE file for details. Components of this program may be licensed under more restrictive licenses which must be honored. [INFO ORD-0030] Using 32 thread(s). mkdir -p ./objects/nangate45/ibex/ibex_m4_sp /OpenROAD-flow-scripts/flow/scripts/flow.sh 1_synth synth_odb Running synth_odb.tcl, stage 1_synth read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib [INFO ODB-0227] LEF file: /OpenROAD-flow-scripts/flow/platforms/nangate45/lef/NangateOpenCellLibrary.tech.lef, created 22 layers, 27 vias [INFO ODB-0227] LEF file: /OpenROAD-flow-scripts/flow/platforms/nangate45/lef/NangateOpenCellLibrary.macro.mod.lef, created 135 library cells link_design ibex_core read_sdc ./results/nangate45/ibex/ibex_m4_sp/1_2_yosys.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl eliminate_dead_logic Removed 0 unused instances and 0 unused nets. Design area 28486 um^2 100% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/1_synth.odb write_sdc -no_timestamp ./results/nangate45/ibex/ibex_m4_sp/1_synth.sdc Elapsed time: 0:00.56[h:]min:sec. CPU time: user 0.45 sys 0.04 (87%). Peak memory: 151756KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 1_synth .odb 0 148 9396d936f1563e2c8258 1_synth .sdc 8e98133a22ebf9c7195d /OpenROAD-flow-scripts/flow/scripts/flow.sh 2_1_floorplan floorplan Running floorplan.tcl, stage 2_1_floorplan read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/1_synth.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/1_synth.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl ========================================================================== Floorplan check_setup -------------------------------------------------------------------------- number instances in verilog is 14871 [INFO IFP-0107] Defining die area using utilization: 35.00% and aspect ratio: 1. [WARNING IFP-0028] Core area lower left (1.000, 1.000) snapped to (1.140, 1.400). [INFO IFP-0001] Added 203 rows of 1500 site FreePDK45_38x28_10R_NP_162NW_34O. [INFO IFP-0100] Die BBox: ( 0.000 0.000 ) ( 287.285 287.285 ) um [INFO IFP-0101] Core BBox: ( 1.140 1.400 ) ( 286.140 285.600 ) um [INFO IFP-0102] Core area: 80997.000 um^2 [INFO IFP-0103] Total instances area: 28485.674 um^2 [INFO IFP-0104] Effective utilization: 0.352 [INFO IFP-0105] Number of instances: 14871 source /OpenROAD-flow-scripts/flow/platforms/nangate45/make_tracks.tcl source /OpenROAD-flow-scripts/flow/platforms/nangate45/fastroute.tcl Repair tie lo fanout... [INFO RSZ-0042] Inserted 7 tie LOGIC0_X1 instances. Repair tie hi fanout... repair_timing -setup_margin 0 -hold_margin 0 -repair_tns 100 -setup -skip_last_gasp -sequence unbuffer,sizeup,swap,vt_swap -verbose [WARNING EST-0027] no estimated parasitics. Using wire load models. [INFO RSZ-0100] Repair move sequence: UnbufferMove SizeUpMove SwapPinsMove [INFO RSZ-0094] Found 409 endpoints with setup violations. [INFO RSZ-0099] Repairing 409 out of 409 (100.00%) violating endpoints... Iter | Removed | Resized | Inserted | Cloned | Pin | Area | WNS | StTNS | EnTNS | Viol | Worst | Buffers | Gates | Buffers | Gates | Swaps | | | | | Endpts | St/EnPt ------------------------------------------------------------------------------------------------------------------------------ 0* | 0 | 0 | 0 | 0 | 0 | +0.0% | -0.186 | -6.4 | -44.5 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 10* | 0 | 9 | 0 | 0 | 0 | +0.0% | -0.078 | -6.0 | -4.8 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 20* | 0 | 19 | 0 | 0 | 0 | +0.0% | -0.062 | -5.9 | -2.7 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 30* | 0 | 29 | 0 | 0 | 0 | +0.0% | -0.048 | -5.9 | -1.6 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 40* | 0 | 39 | 0 | 0 | 0 | +0.1% | -0.031 | -5.9 | -0.9 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 49* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 50* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 51* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 53* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 55* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 57* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 59* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 60* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 61* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 63* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 65* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 67* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 69* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 70* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 71* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 73* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 75* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 77* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 79* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 80* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 81* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 83* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 85* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 87* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 89* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 90* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 91* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 93* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 95* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 97* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 99* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 100* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 101* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 103* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 105* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 107* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 108* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 109* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 110* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 110* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 111* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 112* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 113* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 114* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 115* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 116* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 117* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 118* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 119* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 120* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 120* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 121* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 122* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 123* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 124* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 125* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 126* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 127* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 128* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 129* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 130* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 130* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 131* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 132* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 133* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 134* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 135* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 136* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 137* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 138* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 139* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 140* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 140* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 141* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 142* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 143* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 144* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 145* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 146* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 147* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 148* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 149* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 150* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 150* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 151* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 152* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 153* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 154* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 155* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 156* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 157* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 158* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 159* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 160* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 160* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 161* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 162* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 163* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 164* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 165* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 166* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 167* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 168* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 169* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 170* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 170* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 171* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 172* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 173* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 174* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 175* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 176* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 177* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 178* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 179* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 180* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 180* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 181* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 182* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 183* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 184* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 185* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 186* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 187* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 188* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 189* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 190* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 190* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 191* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 192* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 193* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 194* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 195* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 196* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 197* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 198* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 199* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 200* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 200* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 201* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 202* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 203* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 204* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 205* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 206* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 207* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 208* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 209* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 210* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 210* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 211* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 212* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 213* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 214* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 215* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 216* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 217* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 218* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 219* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 220* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 220* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 221* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 222* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 223* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 224* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 225* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 226* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 227* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 228* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 229* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 230* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 230* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 231* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 232* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 233* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 234* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 235* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 236* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 237* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 238* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 239* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 240* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 240* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 241* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 242* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 243* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 244* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 245* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 246* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 247* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 248* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 249* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 250* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 250* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 251* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 252* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 253* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 254* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 255* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 256* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 257* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 258* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 259* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 260* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 260* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 261* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 262* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 263* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 264* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 265* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 266* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 267* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 268* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 269* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 270* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 270* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 271* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 272* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 273* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 274* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 275* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 276* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 277* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 278* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 279* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 280* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 280* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 281* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 282* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 283* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 284* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 285* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 286* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 287* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 288* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 289* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 290* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 290* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 291* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 292* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 293* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 294* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 295* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 296* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 297* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 298* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 299* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 300* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 300* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 301* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 302* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 303* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 304* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 305* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 306* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 307* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 308* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 309* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 310* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 310* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 311* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 312* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 313* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 314* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 315* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 316* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 317* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 318* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 319* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 320* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 320* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 321* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 322* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 323* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 324* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 325* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 326* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 327* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 328* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 329* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 330* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 330* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 331* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 332* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 333* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 334* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 335* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 336* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 337* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 338* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 339* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 340* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 340* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 341* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 342* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 343* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 344* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 345* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 346* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 347* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 348* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 349* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 350* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 350* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 351* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 352* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 353* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 354* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 355* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 356* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 357* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 358* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 359* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 360* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 360* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 361* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 362* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 363* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 364* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 365* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 366* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 367* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 368* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 369* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 370* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 370* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 371* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 372* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 373* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 374* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 375* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 376* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 377* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 378* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 379* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 380* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 380* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 381* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 382* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 383* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 384* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 385* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 386* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 387* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 388* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 389* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 390* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 390* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 391* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 392* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 393* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 394* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 395* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 396* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 397* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 398* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 399* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 400* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 400* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 401* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 402* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 403* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 404* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 405* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 406* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 407* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 408* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 409* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 410* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 410* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 411* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 412* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 413* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 414* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 415* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 416* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 417* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 418* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 419* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 420* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 420* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 421* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 422* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 423* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 424* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 425* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 426* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 427* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 428* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 429* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 430* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 430* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 431* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 432* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 433* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 434* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 435* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 436* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 437* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 438* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 439* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 440* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 440* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 441* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 442* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 443* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 444* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 445* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 446* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 447* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 448* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 449* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 450* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 450* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 451* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 452* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 453* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 454* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 455* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 456* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 457* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 458* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 459* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 460* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 460* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 461* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 462* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 463* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 464* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 465* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 466* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 467* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 468* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 469* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 470* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 470* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 471* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 472* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 473* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 474* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 475* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 476* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 477* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 478* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 479* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 480* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 480* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 481* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 482* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 483* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 484* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 485* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 486* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D 486* | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 409 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D final | 0 | 47 | 0 | 0 | 0 | +0.1% | -0.011 | -5.8 | -0.3 | 30 | gen_regfile_ff.register_file_i.rf_reg\[124\]$_DFFE_PN0P_/D ------------------------------------------------------------------------------------------------------------------------------ [INFO RSZ-0051] Resized 47 instances: 47 up, 0 up match, 0 down, 0 VT [WARNING RSZ-0062] Unable to repair all setup violations. [INFO RSZ-0505] Runtime: 17.66s Took 18 seconds: repair_timing -setup_margin 0 -hold_margin 0 -repair_tns 100 -setup -skip_last_gasp -sequence unbuffer,sizeup,swap,vt_swap -verbose Default units for flow time 1ns capacitance 1fF resistance 1kohm voltage 1v current 1mA power 1nW distance 1um Layer | Unit Resistance | Unit Capacitance | (kohm/um) | (fF/um) ------------------------------------------------ metal1 | 5.43e-03 | 7.42e-02 metal2 | 3.57e-03 | 8.34e-02 metal3 | 3.57e-03 | 1.04e-01 metal4 | 1.50e-03 | 1.19e-01 metal5 | 1.50e-03 | 1.09e-01 metal6 | 1.50e-03 | 1.14e-01 metal7 | 1.88e-04 | 1.17e-01 metal8 | 1.88e-04 | 9.45e-02 metal9 | 3.75e-05 | 1.06e-01 metal10 | 3.75e-05 | 7.37e-01 ------------------------------------------------ Layer | Via Resistance | (kohm) ---------------------------- via1 | 5.00e-03 via2 | 5.00e-03 via3 | 5.00e-03 via4 | 3.00e-03 via5 | 3.00e-03 via6 | 3.00e-03 via7 | 1.00e-03 via8 | 1.00e-03 via9 | 5.00e-04 ---------------------------- Report metrics stage 2, floorplan final... ========================================================================== floorplan final report_design_area -------------------------------------------------------------------------- Design area 28508 um^2 35% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/2_1_floorplan.odb write_sdc -no_timestamp ./results/nangate45/ibex/ibex_m4_sp/2_1_floorplan.sdc Elapsed time: 0:22.55[h:]min:sec. CPU time: user 19.27 sys 1.50 (92%). Peak memory: 195200KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 2_1_floorplan .odb 22 190 daa00aa10544e7357176 2_1_floorplan .sdc 8e98133a22ebf9c7195d /OpenROAD-flow-scripts/flow/scripts/flow.sh 2_2_floorplan_macro macro_place Running macro_place.tcl, stage 2_2_floorplan_macro read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/2_1_floorplan.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_1_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl No macros found: Skipping macro_placement Design area 28508 um^2 35% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/2_2_floorplan_macro.odb Elapsed time: 0:00.53[h:]min:sec. CPU time: user 0.35 sys 0.05 (74%). Peak memory: 136884KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 2_2_floorplan_macro .odb 0 133 daa00aa10544e7357176 /OpenROAD-flow-scripts/flow/scripts/flow.sh 2_3_floorplan_tapcell tapcell Running tapcell.tcl, stage 2_3_floorplan_tapcell read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/2_2_floorplan_macro.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_1_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl [INFO TAP-0004] Inserted 406 endcaps. [INFO TAP-0005] Inserted 205 tapcells. Design area 28670 um^2 35% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/2_3_floorplan_tapcell.odb Elapsed time: 0:00.56[h:]min:sec. CPU time: user 0.36 sys 0.06 (74%). Peak memory: 127656KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 2_3_floorplan_tapcell .odb 0 124 9296c6efd74bbf58a508 /OpenROAD-flow-scripts/flow/scripts/flow.sh 2_4_floorplan_pdn pdn Running pdn.tcl, stage 2_4_floorplan_pdn read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/2_3_floorplan_tapcell.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_1_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl [WARNING PDN-1051] No instances found for grid (CORE_macro_grid_1). [WARNING PDN-1051] No instances found for grid (CORE_macro_grid_2). [INFO PDN-0001] Inserting grid: grid [INFO PDN-0500] Runtime: 0.02s Design area 28670 um^2 35% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/2_4_floorplan_pdn.odb Elapsed time: 0:00.49[h:]min:sec. CPU time: user 0.35 sys 0.05 (81%). Peak memory: 141736KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 2_4_floorplan_pdn .odb 0 138 c3143409d109579a6c04 cp ./results/nangate45/ibex/ibex_m4_sp/2_4_floorplan_pdn.odb ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.odb cp ./results/nangate45/ibex/ibex_m4_sp/2_1_floorplan.sdc ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.sdc /OpenROAD-flow-scripts/flow/scripts/flow.sh 3_1_place_gp_skip_io global_place_skip_io Running global_place_skip_io.tcl, stage 3_1_place_gp_skip_io read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl [INFO GPL-0022] Initialize gpl and calculate uniform density. Placement density is 0.5219999885559082, computed from PLACE_DENSITY_LB_ADDON 0.20 and lower bound 0.38999998569488525 global_placement -skip_io -density 0.5219999885559082 -pad_left 0 -pad_right 0 [INFO GPL-0001] ---- Initialize GPL Main Data Structures [INFO GPL-0002] DBU: 2000 [INFO GPL-0003] SiteSize: ( 0.190 1.400 ) um [INFO GPL-0004] CoreBBox: ( 1.140 1.400 ) ( 286.140 285.600 ) um [INFO GPL-0036] Movable instances area: 28507.752 um^2 [INFO GPL-0037] Total instances area: 28670.278 um^2 [INFO GPL-0035] Pin density area adjust: 2214.919 um^2 [INFO GPL-0032] ---- Initialize Region: Top-level [INFO GPL-0006] Number of instances: 15488 [INFO GPL-0007] Movable instances: 14877 [INFO GPL-0008] Fixed instances: 611 [INFO GPL-0009] Dummy instances: 0 [INFO GPL-0010] Number of nets: 17539 [INFO GPL-0011] Number of pins: 57357 [INFO GPL-0012] Die BBox: ( 0.000 0.000 ) ( 287.285 287.285 ) um [INFO GPL-0013] Core BBox: ( 1.140 1.400 ) ( 286.140 285.600 ) um [INFO GPL-0016] Core area: 80997.000 um^2 [INFO GPL-0014] Region name: top-level. [INFO GPL-0015] Region area: 80997.000 um^2 [INFO GPL-0017] Fixed instances area: 162.526 um^2 [INFO GPL-0018] Movable instances area: 30722.671 um^2 [INFO GPL-0019] Utilization: 38.007 % [INFO GPL-0020] Standard cells area: 30722.671 um^2 [INFO GPL-0021] Large instances area: 0.000 um^2 [INFO GPL-0005] ---- Execute Conjugate Gradient Initial Placement. [INFO GPL-0051] Source of initial instance position counters: Odb location = 0 Core center = 14877 Region center = 0 [INFO GPL-0033] ---- Initialize Nesterov Region: Top-level [INFO GPL-0023] Placement target density: 0.5220 [INFO GPL-0024] Movable insts average area: 2.065 um^2 [INFO GPL-0025] Ideal bin area: 3.956 um^2 [INFO GPL-0026] Ideal bin count: 20473 [INFO GPL-0027] Total bin area: 80997.000 um^2 [INFO GPL-0028] Bin count (X, Y): 128 , 128 [INFO GPL-0029] Bin size (W * H): 2.227 * 2.220 um [INFO GPL-0030] Number of bins: 16384 [INFO GPL-0084] ---- Execute Nesterov Global Placement. [INFO GPL-0031] HPWL: Half-Perimeter Wirelength Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 0 | 0.9991 | 1.585183e+04 | +0.00% | 6.58e-16 | 10 | 0.9988 | 1.244887e+04 | -21.47% | 1.07e-15 | 20 | 0.9988 | 1.236798e+04 | -0.65% | 1.75e-15 | 30 | 0.9987 | 1.233403e+04 | -0.27% | 2.84e-15 | 40 | 0.9987 | 1.230304e+04 | -0.25% | 4.63e-15 | 50 | 0.9987 | 1.227480e+04 | -0.23% | 7.54e-15 | 60 | 0.9986 | 1.225873e+04 | -0.13% | 1.23e-14 | 70 | 0.9986 | 1.225632e+04 | -0.02% | 2.00e-14 | 80 | 0.9986 | 1.227240e+04 | +0.13% | 3.26e-14 | 90 | 0.9984 | 1.232990e+04 | +0.47% | 5.31e-14 | 100 | 0.9981 | 1.249267e+04 | +1.32% | 8.65e-14 | 110 | 0.9978 | 1.291946e+04 | +3.42% | 1.41e-13 | 120 | 0.9973 | 1.378327e+04 | +6.69% | 2.29e-13 | 130 | 0.9968 | 1.523413e+04 | +10.53% | 3.74e-13 | 140 | 0.9954 | 1.760158e+04 | +15.54% | 6.08e-13 | 150 | 0.9930 | 2.158451e+04 | +22.63% | 9.90e-13 | 160 | 0.9894 | 2.792188e+04 | +29.36% | 1.61e-12 | 170 | 0.9844 | 3.570318e+04 | +27.87% | 2.62e-12 | 180 | 0.9787 | 4.314093e+04 | +20.83% | 4.26e-12 | 190 | 0.9718 | 5.088320e+04 | +17.95% | 6.93e-12 | 200 | 0.9621 | 6.103605e+04 | +19.95% | 1.13e-11 | 210 | 0.9463 | 7.382363e+04 | +20.95% | 1.83e-11 | 220 | 0.9242 | 8.835023e+04 | +19.68% | 2.97e-11 | 230 | 0.8986 | 1.028512e+05 | +16.41% | 4.82e-11 | 240 | 0.8707 | 1.178359e+05 | +14.57% | 7.83e-11 | 250 | 0.8391 | 1.329412e+05 | +12.82% | 1.27e-10 | 260 | 0.8027 | 1.466622e+05 | +10.32% | 2.06e-10 | 270 | 0.7631 | 1.617879e+05 | +10.31% | 3.35e-10 | 280 | 0.7198 | 1.748375e+05 | +8.07% | 5.44e-10 | 290 | 0.6764 | 1.863584e+05 | +6.59% | 8.84e-10 | 300 | 0.6306 | 1.969750e+05 | +5.70% | 1.44e-09 | 310 | 0.5824 | 2.063804e+05 | +4.77% | 2.34e-09 | 320 | 0.5337 | 2.136222e+05 | +3.51% | 3.80e-09 | 330 | 0.4852 | 2.191550e+05 | +2.59% | 6.18e-09 | 340 | 0.4366 | 2.243002e+05 | +2.35% | 1.01e-08 | 350 | 0.3897 | 2.284824e+05 | +1.86% | 1.64e-08 | 360 | 0.3444 | 2.316279e+05 | +1.38% | 2.66e-08 | 370 | 0.3119 | 2.333117e+05 | +0.73% | 3.92e-08 | 380 | 0.2786 | 2.348435e+05 | +0.66% | 5.78e-08 | 390 | 0.2464 | 2.360257e+05 | +0.50% | 8.51e-08 | 400 | 0.2160 | 2.372049e+05 | +0.50% | 1.25e-07 | 410 | 0.1877 | 2.380102e+05 | +0.34% | 1.85e-07 | 420 | 0.1625 | 2.386329e+05 | +0.26% | 2.72e-07 | 430 | 0.1394 | 2.391074e+05 | +0.20% | 4.00e-07 | 440 | 0.1209 | 2.396225e+05 | +0.22% | 5.90e-07 | 450 | 0.1046 | 2.400351e+05 | +0.17% | 8.69e-07 | 454 | 0.0987 | 2.402503e+05 | | 1.05e-06 | --------------------------------------------------------------- [INFO GPL-1001] Global placement finished at iteration 454 [INFO GPL-1002] Placed Cell Area 30722.6713 [INFO GPL-1003] Available Free Area 80834.4740 [INFO GPL-1004] Minimum Feasible Density 0.3900 (cell_area / free_area) [INFO GPL-1006] Suggested Target Densities: [INFO GPL-1007] - For 90% usage of free space: 0.4223 [INFO GPL-1008] - For 80% usage of free space: 0.4751 [INFO GPL-1009] - For 50% usage of free space: 0.7601 [INFO GPL-1014] Final placement area: 30722.67 (+0.00%) Took 399 seconds: global_placement -skip_io -density 0.5219999885559082 -pad_left 0 -pad_right 0 Design area 28670 um^2 35% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/3_1_place_gp_skip_io.odb Elapsed time: 6:42.23[h:]min:sec. CPU time: user 1323.37 sys 1.20 (329%). Peak memory: 165052KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 3_1_place_gp_skip_io .odb 402 161 ef8231bacb28e803d9ca /OpenROAD-flow-scripts/flow/scripts/flow.sh 3_2_place_iop io_placement Running io_placement.tcl, stage 3_2_place_iop read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/3_1_place_gp_skip_io.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl place_pins -hor_layers metal5 -ver_layers metal6 Found 0 macro blocks. Using 2 tracks default min distance between IO pins. [INFO PPL-0001] Number of available slots 2036 [INFO PPL-0002] Number of I/O 264 [INFO PPL-0003] Number of I/O w/sink 256 [INFO PPL-0004] Number of I/O w/o sink 8 [INFO PPL-0005] Slots per section 200 [INFO PPL-0008] Successfully assigned pins to sections. [INFO PPL-0012] I/O nets HPWL: 19610.21 um. Design area 28670 um^2 35% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/3_2_place_iop.odb Elapsed time: 0:00.49[h:]min:sec. CPU time: user 0.42 sys 0.05 (97%). Peak memory: 139216KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 3_2_place_iop .odb 0 135 ce5cfccc07f48df00d60 /OpenROAD-flow-scripts/flow/scripts/flow.sh 3_3_place_gp global_place Running global_place.tcl, stage 3_3_place_gp read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/3_2_place_iop.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl [INFO RSZ-0026] Removed 1423 buffers. Perform port buffering... [INFO RSZ-0027] Inserted 149 BUF_X1 input buffers. [INFO RSZ-0028] Inserted 100 BUF_X1 output buffers. [INFO GPL-0022] Initialize gpl and calculate uniform density. Placement density is 0.5060000038146972, computed from PLACE_DENSITY_LB_ADDON 0.20 and lower bound 0.3700000047683716 global_placement -density 0.5060000038146972 -pad_left 0 -pad_right 0 -routability_driven -timing_driven -force_center_initial_place -min_phi_coef 0.95 -max_phi_coef 1.05 [INFO GPL-0001] ---- Initialize GPL Main Data Structures [INFO GPL-0002] DBU: 2000 [INFO GPL-0003] SiteSize: ( 0.190 1.400 ) um [INFO GPL-0004] CoreBBox: ( 1.140 1.400 ) ( 286.140 285.600 ) um [INFO GPL-0036] Movable instances area: 27389.754 um^2 [INFO GPL-0037] Total instances area: 27552.280 um^2 [INFO GPL-0035] Pin density area adjust: 2227.962 um^2 [INFO GPL-0032] ---- Initialize Region: Top-level [INFO GPL-0006] Number of instances: 14314 [INFO GPL-0007] Movable instances: 13703 [INFO GPL-0008] Fixed instances: 611 [INFO GPL-0009] Dummy instances: 0 [INFO GPL-0010] Number of nets: 16365 [INFO GPL-0011] Number of pins: 55273 [INFO GPL-0012] Die BBox: ( 0.000 0.000 ) ( 287.285 287.285 ) um [INFO GPL-0013] Core BBox: ( 1.140 1.400 ) ( 286.140 285.600 ) um [INFO GPL-0016] Core area: 80997.000 um^2 [INFO GPL-0014] Region name: top-level. [INFO GPL-0015] Region area: 80997.000 um^2 [INFO GPL-0017] Fixed instances area: 162.526 um^2 [INFO GPL-0018] Movable instances area: 29617.716 um^2 [INFO GPL-0019] Utilization: 36.640 % [INFO GPL-0020] Standard cells area: 29617.716 um^2 [INFO GPL-0021] Large instances area: 0.000 um^2 [INFO GPL-0005] ---- Execute Conjugate Gradient Initial Placement. [INFO GPL-0051] Source of initial instance position counters: Odb location = 0 Core center = 13703 Region center = 0 [InitialPlace] Iter: 1 conjugate gradient residual: 0.00152377 HPWL: 521114850 [InitialPlace] Iter: 2 conjugate gradient residual: 0.00002818 HPWL: 211952745 [InitialPlace] Iter: 3 conjugate gradient residual: 0.00000770 HPWL: 209344370 [InitialPlace] Iter: 4 conjugate gradient residual: 0.00003151 HPWL: 207320654 [InitialPlace] Iter: 5 conjugate gradient residual: 0.00001469 HPWL: 204434972 [InitialPlace] Iter: 6 conjugate gradient residual: 0.00000861 HPWL: 201997600 [INFO GPL-0033] ---- Initialize Nesterov Region: Top-level [INFO GPL-0023] Placement target density: 0.5060 [INFO GPL-0024] Movable insts average area: 2.161 um^2 [INFO GPL-0025] Ideal bin area: 4.272 um^2 [INFO GPL-0026] Ideal bin count: 18961 [INFO GPL-0027] Total bin area: 80997.000 um^2 [INFO GPL-0028] Bin count (X, Y): 128 , 128 [INFO GPL-0029] Bin size (W * H): 2.227 * 2.220 um [INFO GPL-0030] Number of bins: 16384 [INFO GPL-0084] ---- Execute Nesterov Global Placement. [INFO GPL-0031] HPWL: Half-Perimeter Wirelength Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 0 | 0.9897 | 5.069147e+04 | +0.00% | 3.36e-16 | 10 | 0.9637 | 7.075538e+04 | +39.58% | 5.46e-16 | 20 | 0.9517 | 7.872703e+04 | +11.27% | 8.87e-16 | 30 | 0.9451 | 8.119494e+04 | +3.13% | 1.44e-15 | 40 | 0.9414 | 8.233154e+04 | +1.40% | 2.35e-15 | 50 | 0.9399 | 8.403928e+04 | +2.07% | 3.83e-15 | 60 | 0.9401 | 8.534408e+04 | +1.55% | 6.24e-15 | 70 | 0.9391 | 8.557849e+04 | +0.27% | 1.02e-14 | 80 | 0.9386 | 8.512992e+04 | -0.52% | 1.65e-14 | 90 | 0.9385 | 8.464474e+04 | -0.57% | 2.69e-14 | 100 | 0.9381 | 8.441728e+04 | -0.27% | 4.39e-14 | 110 | 0.9386 | 8.455891e+04 | +0.17% | 7.15e-14 | 120 | 0.9392 | 8.512238e+04 | +0.67% | 1.16e-13 | 130 | 0.9383 | 8.583958e+04 | +0.84% | 1.90e-13 | 140 | 0.9379 | 8.648526e+04 | +0.75% | 3.09e-13 | 150 | 0.9375 | 8.705066e+04 | +0.65% | 5.03e-13 | 160 | 0.9369 | 8.770875e+04 | +0.76% | 8.19e-13 | 170 | 0.9357 | 8.872433e+04 | +1.16% | 1.33e-12 | 180 | 0.9341 | 9.033243e+04 | +1.81% | 2.17e-12 | 190 | 0.9314 | 9.274941e+04 | +2.68% | 3.54e-12 | 200 | 0.9266 | 9.618205e+04 | +3.70% | 5.76e-12 | 210 | 0.9180 | 1.008626e+05 | +4.87% | 9.37e-12 | 220 | 0.9059 | 1.068121e+05 | +5.90% | 1.52e-11 | 230 | 0.8905 | 1.135872e+05 | +6.34% | 2.48e-11 | 240 | 0.8691 | 1.206204e+05 | +6.19% | 4.03e-11 | 250 | 0.8438 | 1.285668e+05 | +6.59% | 6.56e-11 | 260 | 0.8119 | 1.384479e+05 | +7.69% | 1.07e-10 | 270 | 0.7754 | 1.470411e+05 | +6.21% | 1.73e-10 | 280 | 0.7406 | 1.563114e+05 | +6.30% | 2.82e-10 | 290 | 0.6976 | 1.649837e+05 | +5.55% | 4.58e-10 | 300 | 0.6528 | 1.697701e+05 | +2.90% | 7.45e-10 | [INFO GPL-0100] Timing-driven iteration 1/2, virtual: false. [INFO GPL-0101] Iter: 306, overflow: 0.631, keep resizer changes at: 1, HPWL: 345592774 Iteration | Area | Resized | Buffers | Nets repaired | Remaining --------------------------------------------------------------------- 0 | +0.0% | 0 | 0 | 0 | 16365 final | +2.1% | 119 | 267 | 259 | 0 --------------------------------------------------------------------- [INFO RSZ-0034] Found 123 slew violations. [INFO RSZ-0036] Found 194 capacitance violations. [INFO RSZ-0039] Resized 119 instances. [INFO RSZ-0038] Inserted 267 buffers in 259 nets. Iter | Area | Removed | Inserted | Pins | | Buffers | Buffers | Remaining ------------------------------------------------------- 0 | +0.0% | 0 | 0 | 16199 1600 | +0.2% | 1 | 29 | 14599 3200 | +2.1% | 58 | 422 | 12999 4800 | +2.7% | 91 | 696 | 11399 6400 | +2.9% | 101 | 792 | 9799 8000 | +3.0% | 143 | 897 | 8199 9600 | +3.8% | 187 | 1217 | 6599 11200 | +3.8% | 200 | 1247 | 4999 12800 | +4.5% | 243 | 1414 | 3399 14400 | +4.5% | 246 | 1420 | 1799 16000 | +4.5% | 246 | 1420 | 199 final | +4.5% | 267 | 1462 | 0 ------------------------------------------------------- [INFO GPL-0106] Timing-driven: worst slack -7.2499995e-10 [INFO GPL-0107] Timing-driven: repair_design delta area: 1817.849 um^2 (+6.14%) [INFO GPL-0108] Timing-driven: repair_design, gpl delta gcells: 1462 (+10.67%) [INFO GPL-0109] Timing-driven: repair_design, gcells created: 1729, deleted: 267 [INFO GPL-0110] Timing-driven: new target density: 0.5284886 Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 310 | 0.6007 | 2.034503e+05 | +19.84% | 1.20e-09 | [INFO GPL-0038] Routability snapshot saved at iter = 313 312 | 0.5996 | 2.051481e+05 | | | 320 | 0.5673 | 2.065090e+05 | +1.50% | 1.96e-09 | 330 | 0.5236 | 2.089945e+05 | +1.20% | 3.19e-09 | 340 | 0.4770 | 2.125030e+05 | +1.68% | 5.19e-09 | 350 | 0.4389 | 2.151933e+05 | +1.27% | 8.45e-09 | 360 | 0.3953 | 2.176696e+05 | +1.15% | 1.38e-08 | 370 | 0.3534 | 2.192086e+05 | +0.71% | 2.24e-08 | 380 | 0.3202 | 2.202793e+05 | +0.49% | 3.37e-08 | [INFO GPL-0040] Routability iteration: 1 [INFO GPL-0041] Total routing overflow: 113.2334 [INFO GPL-0042] Number of overflowed tiles: 980 (9.80%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.3685 [INFO GPL-0044] Average top 1.0% routing congestion: 1.3221 [INFO GPL-0045] Average top 2.0% routing congestion: 1.2705 [INFO GPL-0046] Average top 5.0% routing congestion: 1.1868 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.3453 [INFO GPL-0048] Routing congestion (1.3453) lower than previous minimum (1e+30). Updating minimum. [INFO GPL-0086] Inflated area: 1657.873 um^2 (+5.27%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 5211, After: 4446 (-14.68%) [INFO GPL-0077] Filler area (um^2) : Before: 11284.531, After: 9627.103 (-14.69%) [INFO GPL-0078] Removed fillers count: 765, area removed: 1656.485 um^2. Remaining area to be compensated by modifying density: 1.388 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 9627.103 um^2 (-14.69%) [INFO GPL-0061] Total non-inflated area: 42720.541 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 44378.414 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 390 | 0.5969 | 2.075721e+05 | -5.77% | 1.51e-09 | 400 | 0.5494 | 2.172145e+05 | +4.65% | 2.21e-09 | 410 | 0.5219 | 2.199403e+05 | +1.25% | 3.26e-09 | 420 | 0.4881 | 2.183184e+05 | -0.74% | 4.80e-09 | 430 | 0.4544 | 2.223667e+05 | +1.85% | 7.06e-09 | 440 | 0.4162 | 2.261737e+05 | +1.71% | 1.04e-08 | 450 | 0.3858 | 2.263590e+05 | +0.08% | 1.53e-08 | 460 | 0.3524 | 2.279885e+05 | +0.72% | 2.26e-08 | 470 | 0.3187 | 2.293549e+05 | +0.60% | 3.32e-08 | [INFO GPL-0040] Routability iteration: 2 [INFO GPL-0041] Total routing overflow: 74.4463 [INFO GPL-0042] Number of overflowed tiles: 909 (9.09%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.2583 [INFO GPL-0044] Average top 1.0% routing congestion: 1.2225 [INFO GPL-0045] Average top 2.0% routing congestion: 1.1836 [INFO GPL-0046] Average top 5.0% routing congestion: 1.1262 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.2404 [INFO GPL-0048] Routing congestion (1.2404) lower than previous minimum (1.345). Updating minimum. [INFO GPL-0086] Inflated area: 993.074 um^2 (+3.00%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 4446, After: 3988 (-10.30%) [INFO GPL-0077] Filler area (um^2) : Before: 9627.103, After: 8635.377 (-10.30%) [INFO GPL-0078] Removed fillers count: 458, area removed: 991.726 um^2. Remaining area to be compensated by modifying density: 1.348 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 8635.377 um^2 (-10.30%) [INFO GPL-0061] Total non-inflated area: 42721.889 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 43714.963 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 480 | 0.5900 | 2.159531e+05 | -5.84% | 1.56e-09 | 490 | 0.5445 | 2.259847e+05 | +4.65% | 2.30e-09 | 500 | 0.5138 | 2.285773e+05 | +1.15% | 3.38e-09 | 510 | 0.4823 | 2.241134e+05 | -1.95% | 4.98e-09 | 520 | 0.4478 | 2.298929e+05 | +2.58% | 7.33e-09 | 530 | 0.4108 | 2.334447e+05 | +1.54% | 1.08e-08 | 540 | 0.3806 | 2.325368e+05 | -0.39% | 1.59e-08 | 550 | 0.3479 | 2.344226e+05 | +0.81% | 2.34e-08 | 560 | 0.3150 | 2.350770e+05 | +0.28% | 3.45e-08 | [INFO GPL-0040] Routability iteration: 3 [INFO GPL-0041] Total routing overflow: 57.6812 [INFO GPL-0042] Number of overflowed tiles: 819 (8.19%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.2456 [INFO GPL-0044] Average top 1.0% routing congestion: 1.2022 [INFO GPL-0045] Average top 2.0% routing congestion: 1.1621 [INFO GPL-0046] Average top 5.0% routing congestion: 1.1034 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.2239 [INFO GPL-0048] Routing congestion (1.2239) lower than previous minimum (1.24). Updating minimum. [INFO GPL-0086] Inflated area: 846.508 um^2 (+2.48%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 3988, After: 3598 (-9.78%) [INFO GPL-0077] Filler area (um^2) : Before: 8635.377, After: 7790.894 (-9.78%) [INFO GPL-0078] Removed fillers count: 390, area removed: 844.483 um^2. Remaining area to be compensated by modifying density: 2.026 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 7790.894 um^2 (-9.78%) [INFO GPL-0061] Total non-inflated area: 42723.915 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 43570.423 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 570 | 0.5770 | 2.266705e+05 | -3.58% | 1.62e-09 | 580 | 0.5424 | 2.344085e+05 | +3.41% | 2.38e-09 | 590 | 0.5076 | 2.362991e+05 | +0.81% | 3.51e-09 | 600 | 0.4797 | 2.290137e+05 | -3.08% | 5.17e-09 | 610 | 0.4430 | 2.369019e+05 | +3.44% | 7.61e-09 | 620 | 0.4052 | 2.394288e+05 | +1.07% | 1.12e-08 | 630 | 0.3748 | 2.370625e+05 | -0.99% | 1.65e-08 | 640 | 0.3445 | 2.396443e+05 | +1.09% | 2.43e-08 | 650 | 0.3112 | 2.397638e+05 | +0.05% | 3.58e-08 | [INFO GPL-0040] Routability iteration: 4 [INFO GPL-0041] Total routing overflow: 38.0305 [INFO GPL-0042] Number of overflowed tiles: 666 (6.66%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1765 [INFO GPL-0044] Average top 1.0% routing congestion: 1.1490 [INFO GPL-0045] Average top 2.0% routing congestion: 1.1185 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0731 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.1628 [INFO GPL-0048] Routing congestion (1.1628) lower than previous minimum (1.224). Updating minimum. [INFO GPL-0086] Inflated area: 533.601 um^2 (+1.53%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 3598, After: 3352 (-6.84%) [INFO GPL-0077] Filler area (um^2) : Before: 7790.894, After: 7258.221 (-6.84%) [INFO GPL-0078] Removed fillers count: 246, area removed: 532.674 um^2. Remaining area to be compensated by modifying density: 0.928 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 7258.221 um^2 (-6.84%) [INFO GPL-0061] Total non-inflated area: 42724.842 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 43258.444 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 660 | 0.5639 | 2.336946e+05 | -2.53% | 1.68e-09 | 670 | 0.5379 | 2.407017e+05 | +3.00% | 2.48e-09 | 680 | 0.5052 | 2.412695e+05 | +0.24% | 3.64e-09 | 690 | 0.4737 | 2.326330e+05 | -3.58% | 5.37e-09 | 700 | 0.4380 | 2.421863e+05 | +4.11% | 7.90e-09 | 710 | 0.4025 | 2.430185e+05 | +0.34% | 1.16e-08 | 720 | 0.3721 | 2.405872e+05 | -1.00% | 1.71e-08 | 730 | 0.3407 | 2.433536e+05 | +1.15% | 2.52e-08 | 740 | 0.3102 | 2.430544e+05 | -0.12% | 3.72e-08 | [INFO GPL-0040] Routability iteration: 5 [INFO GPL-0041] Total routing overflow: 31.9166 [INFO GPL-0042] Number of overflowed tiles: 623 (6.23%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1446 [INFO GPL-0044] Average top 1.0% routing congestion: 1.1234 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0988 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0619 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.1340 [INFO GPL-0048] Routing congestion (1.1340) lower than previous minimum (1.163). Updating minimum. [INFO GPL-0086] Inflated area: 424.598 um^2 (+1.20%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 3352, After: 3156 (-5.85%) [INFO GPL-0077] Filler area (um^2) : Before: 7258.221, After: 6833.814 (-5.85%) [INFO GPL-0078] Removed fillers count: 196, area removed: 424.407 um^2. Remaining area to be compensated by modifying density: 0.192 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 6833.814 um^2 (-5.85%) [INFO GPL-0061] Total non-inflated area: 42725.034 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 43149.632 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 750 | 0.5532 | 2.395950e+05 | -1.42% | 1.75e-09 | 760 | 0.5332 | 2.452676e+05 | +2.37% | 2.57e-09 | 770 | 0.5026 | 2.447114e+05 | -0.23% | 3.79e-09 | 780 | 0.4699 | 2.354741e+05 | -3.77% | 5.58e-09 | 790 | 0.4334 | 2.461350e+05 | +4.53% | 8.20e-09 | 800 | 0.3994 | 2.456333e+05 | -0.20% | 1.21e-08 | 810 | 0.3696 | 2.433609e+05 | -0.93% | 1.78e-08 | 820 | 0.3378 | 2.460265e+05 | +1.10% | 2.62e-08 | 830 | 0.3052 | 2.456347e+05 | -0.16% | 3.86e-08 | [INFO GPL-0040] Routability iteration: 6 [INFO GPL-0041] Total routing overflow: 25.6779 [INFO GPL-0042] Number of overflowed tiles: 536 (5.36%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1326 [INFO GPL-0044] Average top 1.0% routing congestion: 1.1119 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0889 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0512 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.1222 [INFO GPL-0048] Routing congestion (1.1222) lower than previous minimum (1.134). Updating minimum. [INFO GPL-0086] Inflated area: 352.788 um^2 (+0.98%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 3156, After: 2994 (-5.13%) [INFO GPL-0077] Filler area (um^2) : Before: 6833.814, After: 6483.029 (-5.13%) [INFO GPL-0078] Removed fillers count: 162, area removed: 350.785 um^2. Remaining area to be compensated by modifying density: 2.003 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 6483.029 um^2 (-5.13%) [INFO GPL-0061] Total non-inflated area: 42727.037 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 43079.825 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 840 | 0.5508 | 2.432641e+05 | -0.97% | 1.75e-09 | 850 | 0.5324 | 2.488771e+05 | +2.31% | 2.57e-09 | 860 | 0.5010 | 2.478667e+05 | -0.41% | 3.78e-09 | 870 | 0.4699 | 2.380881e+05 | -3.95% | 5.57e-09 | 880 | 0.4336 | 2.487889e+05 | +4.49% | 8.19e-09 | 890 | 0.4000 | 2.479336e+05 | -0.34% | 1.21e-08 | 900 | 0.3664 | 2.456971e+05 | -0.90% | 1.78e-08 | 910 | 0.3371 | 2.481755e+05 | +1.01% | 2.62e-08 | 920 | 0.3051 | 2.478033e+05 | -0.15% | 3.86e-08 | [INFO GPL-0040] Routability iteration: 7 [INFO GPL-0041] Total routing overflow: 26.7600 [INFO GPL-0042] Number of overflowed tiles: 506 (5.06%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1471 [INFO GPL-0044] Average top 1.0% routing congestion: 1.1231 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0970 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0535 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.1351 [INFO GPL-0049] Routing congestion (1.1351) higher than minimum (1.1222). Consecutive non-improvement count: 1. [INFO GPL-0086] Inflated area: 378.383 um^2 (+1.04%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2994, After: 2820 (-5.81%) [INFO GPL-0077] Filler area (um^2) : Before: 6483.029, After: 6106.260 (-5.81%) [INFO GPL-0078] Removed fillers count: 174, area removed: 376.769 um^2. Remaining area to be compensated by modifying density: 1.613 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 6106.260 um^2 (-5.81%) [INFO GPL-0061] Total non-inflated area: 42728.650 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 43107.033 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 930 | 0.5438 | 2.516252e+05 | +1.54% | 1.81e-09 | 940 | 0.5287 | 2.527837e+05 | +0.46% | 2.67e-09 | 950 | 0.4991 | 2.503466e+05 | -0.96% | 3.93e-09 | 960 | 0.4648 | 2.419061e+05 | -3.37% | 5.79e-09 | 970 | 0.4291 | 2.521916e+05 | +4.25% | 8.51e-09 | 980 | 0.3961 | 2.503507e+05 | -0.73% | 1.25e-08 | 990 | 0.3647 | 2.484771e+05 | -0.75% | 1.85e-08 | 1000 | 0.3333 | 2.507009e+05 | +0.89% | 2.72e-08 | 1010 | 0.3026 | 2.501581e+05 | -0.22% | 4.01e-08 | [INFO GPL-0040] Routability iteration: 8 [INFO GPL-0041] Total routing overflow: 20.1368 [INFO GPL-0042] Number of overflowed tiles: 505 (5.05%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1042 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0897 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0714 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0403 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.0969 [INFO GPL-0048] Routing congestion (1.0969) lower than previous minimum (1.122). Updating minimum. [INFO GPL-0086] Inflated area: 271.114 um^2 (+0.74%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2820, After: 2695 (-4.43%) [INFO GPL-0077] Filler area (um^2) : Before: 6106.260, After: 5835.592 (-4.43%) [INFO GPL-0078] Removed fillers count: 125, area removed: 270.668 um^2. Remaining area to be compensated by modifying density: 0.447 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 5835.592 um^2 (-4.43%) [INFO GPL-0061] Total non-inflated area: 42729.097 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 43000.211 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1020 | 0.5411 | 2.540007e+05 | +1.54% | 1.88e-09 | 1030 | 0.5258 | 2.547875e+05 | +0.31% | 2.77e-09 | 1040 | 0.4964 | 2.516120e+05 | -1.25% | 4.08e-09 | 1050 | 0.4613 | 2.455157e+05 | -2.42% | 6.01e-09 | 1060 | 0.4252 | 2.541768e+05 | +3.53% | 8.84e-09 | 1070 | 0.3927 | 2.514262e+05 | -1.08% | 1.30e-08 | 1080 | 0.3613 | 2.505402e+05 | -0.35% | 1.92e-08 | 1090 | 0.3296 | 2.521587e+05 | +0.65% | 2.83e-08 | 1100 | 0.2998 | 2.517566e+05 | -0.16% | 4.16e-08 | [INFO GPL-0040] Routability iteration: 9 [INFO GPL-0041] Total routing overflow: 19.3073 [INFO GPL-0042] Number of overflowed tiles: 476 (4.76%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1048 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0878 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0694 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0385 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.0963 [INFO GPL-0049] Routing congestion (1.0963) higher than minimum (1.0969). Consecutive non-improvement count: 1. [INFO GPL-0086] Inflated area: 255.843 um^2 (+0.69%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2695, After: 2577 (-4.38%) [INFO GPL-0077] Filler area (um^2) : Before: 5835.592, After: 5580.082 (-4.38%) [INFO GPL-0078] Removed fillers count: 118, area removed: 255.510 um^2. Remaining area to be compensated by modifying density: 0.333 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 5580.082 um^2 (-4.38%) [INFO GPL-0061] Total non-inflated area: 42729.430 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42985.272 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1110 | 0.5406 | 2.563958e+05 | +1.84% | 1.96e-09 | 1120 | 0.5207 | 2.571952e+05 | +0.31% | 2.88e-09 | 1130 | 0.4928 | 2.522415e+05 | -1.93% | 4.24e-09 | 1140 | 0.4534 | 2.497932e+05 | -0.97% | 6.24e-09 | 1150 | 0.4225 | 2.561241e+05 | +2.53% | 9.18e-09 | 1160 | 0.3923 | 2.524773e+05 | -1.42% | 1.35e-08 | 1170 | 0.3583 | 2.527132e+05 | +0.09% | 1.99e-08 | 1180 | 0.3266 | 2.536889e+05 | +0.39% | 2.93e-08 | [INFO GPL-0040] Routability iteration: 10 [INFO GPL-0041] Total routing overflow: 17.9769 [INFO GPL-0042] Number of overflowed tiles: 438 (4.38%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1212 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0967 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0717 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0355 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.1090 [INFO GPL-0049] Routing congestion (1.1090) higher than minimum (1.0969). Consecutive non-improvement count: 2. [INFO GPL-0086] Inflated area: 263.337 um^2 (+0.71%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2577, After: 2456 (-4.70%) [INFO GPL-0077] Filler area (um^2) : Before: 5580.082, After: 5318.076 (-4.70%) [INFO GPL-0078] Removed fillers count: 121, area removed: 262.006 um^2. Remaining area to be compensated by modifying density: 1.331 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 5318.076 um^2 (-4.70%) [INFO GPL-0061] Total non-inflated area: 42730.761 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42994.098 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1190 | 0.6568 | 2.040684e+05 | -19.56% | 1.39e-09 | 1200 | 0.5387 | 2.598094e+05 | +27.31% | 2.03e-09 | 1210 | 0.5156 | 2.601920e+05 | +0.15% | 2.99e-09 | 1220 | 0.4922 | 2.526711e+05 | -2.89% | 4.40e-09 | 1230 | 0.4508 | 2.543869e+05 | +0.68% | 6.48e-09 | 1240 | 0.4192 | 2.577398e+05 | +1.32% | 9.54e-09 | 1250 | 0.3895 | 2.535993e+05 | -1.61% | 1.41e-08 | 1260 | 0.3570 | 2.547689e+05 | +0.46% | 2.07e-08 | 1270 | 0.3255 | 2.551317e+05 | +0.14% | 3.05e-08 | [INFO GPL-0040] Routability iteration: 11 [INFO GPL-0041] Total routing overflow: 13.9790 [INFO GPL-0042] Number of overflowed tiles: 359 (3.59%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.0980 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0800 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0592 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0256 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.0890 [INFO GPL-0048] Routing congestion (1.0890) lower than previous minimum (1.097). Updating minimum. [INFO GPL-0086] Inflated area: 198.239 um^2 (+0.53%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2456, After: 2365 (-3.71%) [INFO GPL-0077] Filler area (um^2) : Before: 5318.076, After: 5121.030 (-3.71%) [INFO GPL-0078] Removed fillers count: 91, area removed: 197.046 um^2. Remaining area to be compensated by modifying density: 1.193 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 5121.030 um^2 (-3.71%) [INFO GPL-0061] Total non-inflated area: 42731.954 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42930.193 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1280 | 0.6590 | 2.022326e+05 | -20.73% | 1.39e-09 | 1290 | 0.5382 | 2.625408e+05 | +29.82% | 2.03e-09 | 1300 | 0.5152 | 2.627364e+05 | +0.07% | 2.99e-09 | 1310 | 0.4925 | 2.546322e+05 | -3.08% | 4.40e-09 | 1320 | 0.4500 | 2.564314e+05 | +0.71% | 6.48e-09 | 1330 | 0.4189 | 2.593032e+05 | +1.12% | 9.53e-09 | 1340 | 0.3898 | 2.549349e+05 | -1.68% | 1.40e-08 | 1350 | 0.3581 | 2.561917e+05 | +0.49% | 2.07e-08 | 1360 | 0.3251 | 2.562700e+05 | +0.03% | 3.05e-08 | [INFO GPL-0040] Routability iteration: 12 [INFO GPL-0041] Total routing overflow: 14.4991 [INFO GPL-0042] Number of overflowed tiles: 374 (3.74%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1066 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0846 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0622 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0272 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.0956 [INFO GPL-0049] Routing congestion (1.0956) higher than minimum (1.0890). Consecutive non-improvement count: 1. [INFO GPL-0086] Inflated area: 213.115 um^2 (+0.57%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2365, After: 2267 (-4.14%) [INFO GPL-0077] Filler area (um^2) : Before: 5121.030, After: 4908.826 (-4.14%) [INFO GPL-0078] Removed fillers count: 98, area removed: 212.203 um^2. Remaining area to be compensated by modifying density: 0.911 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 4908.826 um^2 (-4.14%) [INFO GPL-0061] Total non-inflated area: 42732.865 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42945.979 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1370 | 0.6608 | 2.021348e+05 | -21.12% | 1.39e-09 | 1380 | 0.5372 | 2.657109e+05 | +31.45% | 2.03e-09 | 1390 | 0.5134 | 2.655260e+05 | -0.07% | 2.99e-09 | 1400 | 0.4915 | 2.567003e+05 | -3.32% | 4.40e-09 | 1410 | 0.4499 | 2.589456e+05 | +0.87% | 6.47e-09 | 1420 | 0.4199 | 2.611686e+05 | +0.86% | 9.53e-09 | 1430 | 0.3892 | 2.565664e+05 | -1.76% | 1.40e-08 | 1440 | 0.3578 | 2.579171e+05 | +0.53% | 2.07e-08 | 1450 | 0.3247 | 2.578222e+05 | -0.04% | 3.04e-08 | [INFO GPL-0040] Routability iteration: 13 [INFO GPL-0041] Total routing overflow: 14.1392 [INFO GPL-0042] Number of overflowed tiles: 370 (3.70%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.0996 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0814 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0603 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0263 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.0905 [INFO GPL-0049] Routing congestion (1.0905) higher than minimum (1.0890). Consecutive non-improvement count: 2. [INFO GPL-0086] Inflated area: 194.805 um^2 (+0.52%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2267, After: 2178 (-3.93%) [INFO GPL-0077] Filler area (um^2) : Before: 4908.826, After: 4716.111 (-3.93%) [INFO GPL-0078] Removed fillers count: 89, area removed: 192.715 um^2. Remaining area to be compensated by modifying density: 2.089 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 4716.111 um^2 (-3.93%) [INFO GPL-0061] Total non-inflated area: 42734.954 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42929.759 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1460 | 0.6625 | 2.020511e+05 | -21.63% | 1.39e-09 | 1470 | 0.5373 | 2.680557e+05 | +32.67% | 2.03e-09 | 1480 | 0.5117 | 2.677148e+05 | -0.13% | 2.99e-09 | 1490 | 0.4912 | 2.588184e+05 | -3.32% | 4.40e-09 | 1500 | 0.4496 | 2.610353e+05 | +0.86% | 6.47e-09 | 1510 | 0.4190 | 2.625345e+05 | +0.57% | 9.52e-09 | 1520 | 0.3875 | 2.578887e+05 | -1.77% | 1.40e-08 | 1530 | 0.3589 | 2.588894e+05 | +0.39% | 2.07e-08 | 1540 | 0.3248 | 2.589410e+05 | +0.02% | 3.04e-08 | [INFO GPL-0040] Routability iteration: 14 [INFO GPL-0041] Total routing overflow: 11.7528 [INFO GPL-0042] Number of overflowed tiles: 343 (3.43%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.0886 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0701 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0509 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0207 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.0793 [INFO GPL-0048] Routing congestion (1.0793) lower than previous minimum (1.089). Updating minimum. [INFO GPL-0086] Inflated area: 165.879 um^2 (+0.44%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2178, After: 2102 (-3.49%) [INFO GPL-0077] Filler area (um^2) : Before: 4716.111, After: 4551.545 (-3.49%) [INFO GPL-0078] Removed fillers count: 76, area removed: 164.566 um^2. Remaining area to be compensated by modifying density: 1.313 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 4551.545 um^2 (-3.49%) [INFO GPL-0061] Total non-inflated area: 42736.268 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42902.147 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1550 | 0.6638 | 2.019834e+05 | -22.00% | 1.39e-09 | 1560 | 0.5369 | 2.700487e+05 | +33.70% | 2.03e-09 | 1570 | 0.5118 | 2.698107e+05 | -0.09% | 2.98e-09 | 1580 | 0.4905 | 2.608664e+05 | -3.32% | 4.39e-09 | 1590 | 0.4484 | 2.628504e+05 | +0.76% | 6.46e-09 | 1600 | 0.4176 | 2.638003e+05 | +0.36% | 9.51e-09 | 1610 | 0.3881 | 2.587463e+05 | -1.92% | 1.40e-08 | 1620 | 0.3583 | 2.602851e+05 | +0.59% | 2.06e-08 | 1630 | 0.3254 | 2.600621e+05 | -0.09% | 3.04e-08 | [INFO GPL-0040] Routability iteration: 15 [INFO GPL-0041] Total routing overflow: 15.4626 [INFO GPL-0042] Number of overflowed tiles: 373 (3.73%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1125 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0895 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0649 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0289 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.1010 [INFO GPL-0049] Routing congestion (1.1010) higher than minimum (1.0793). Consecutive non-improvement count: 1. [INFO GPL-0086] Inflated area: 201.236 um^2 (+0.53%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2102, After: 2010 (-4.38%) [INFO GPL-0077] Filler area (um^2) : Before: 4551.545, After: 4352.334 (-4.38%) [INFO GPL-0078] Removed fillers count: 92, area removed: 199.211 um^2. Remaining area to be compensated by modifying density: 2.025 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 4352.334 um^2 (-4.38%) [INFO GPL-0061] Total non-inflated area: 42738.292 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42939.528 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1640 | 0.6482 | 2.058324e+05 | -20.85% | 1.45e-09 | 1650 | 0.5372 | 2.729858e+05 | +32.63% | 2.10e-09 | 1660 | 0.5082 | 2.731965e+05 | +0.08% | 3.09e-09 | 1670 | 0.4881 | 2.600728e+05 | -4.80% | 4.56e-09 | 1680 | 0.4454 | 2.663639e+05 | +2.42% | 6.70e-09 | 1690 | 0.4148 | 2.651746e+05 | -0.45% | 9.87e-09 | 1700 | 0.3847 | 2.598151e+05 | -2.02% | 1.45e-08 | 1710 | 0.3549 | 2.617541e+05 | +0.75% | 2.14e-08 | 1720 | 0.3206 | 2.613877e+05 | -0.14% | 3.15e-08 | [INFO GPL-0040] Routability iteration: 16 [INFO GPL-0041] Total routing overflow: 14.2332 [INFO GPL-0042] Number of overflowed tiles: 354 (3.54%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1127 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0876 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0618 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0258 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.1002 [INFO GPL-0049] Routing congestion (1.1002) higher than minimum (1.0793). Consecutive non-improvement count: 2. [INFO GPL-0086] Inflated area: 196.344 um^2 (+0.51%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 2010, After: 1920 (-4.48%) [INFO GPL-0077] Filler area (um^2) : Before: 4352.334, After: 4157.453 (-4.48%) [INFO GPL-0078] Removed fillers count: 90, area removed: 194.881 um^2. Remaining area to be compensated by modifying density: 1.463 um^2 [INFO GPL-0058] White space area: 80834.474 um^2 (+0.00%) [INFO GPL-0059] Movable instances area: 42720.096 um^2 (+0.00%) [INFO GPL-0060] Total filler area: 4157.453 um^2 (-4.48%) [INFO GPL-0061] Total non-inflated area: 42739.756 um^2 (+0.00%) [INFO GPL-0062] Total inflated area: 42936.100 um^2 (+0.00%) [INFO GPL-0063] New Target Density: 0.5285 [INFO GPL-0087] Routability end iteration: increase inflation and revert back to snapshot. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1730 | 0.6496 | 2.058832e+05 | -21.23% | 1.45e-09 | 1740 | 0.5350 | 2.765236e+05 | +34.31% | 2.10e-09 | 1750 | 0.5069 | 2.758467e+05 | -0.24% | 3.09e-09 | 1760 | 0.4901 | 2.612964e+05 | -5.27% | 4.55e-09 | 1770 | 0.4451 | 2.680997e+05 | +2.60% | 6.69e-09 | 1780 | 0.4138 | 2.666044e+05 | -0.56% | 9.86e-09 | 1790 | 0.3822 | 2.609787e+05 | -2.11% | 1.45e-08 | 1800 | 0.3540 | 2.630772e+05 | +0.80% | 2.14e-08 | 1810 | 0.3211 | 2.624276e+05 | -0.25% | 3.15e-08 | [INFO GPL-0040] Routability iteration: 17 [INFO GPL-0041] Total routing overflow: 12.6947 [INFO GPL-0042] Number of overflowed tiles: 334 (3.34%) [INFO GPL-0043] Average top 0.5% routing congestion: 1.1010 [INFO GPL-0044] Average top 1.0% routing congestion: 1.0816 [INFO GPL-0045] Average top 2.0% routing congestion: 1.0573 [INFO GPL-0046] Average top 5.0% routing congestion: 1.0222 [INFO GPL-0047] Routability iteration weighted routing congestion: 1.0913 [INFO GPL-0049] Routing congestion (1.0913) higher than minimum (1.0793). Consecutive non-improvement count: 3. [INFO GPL-0086] Inflated area: 182.056 um^2 (+0.47%) [INFO GPL-0052] Placement target density: 0.5285 [INFO GPL-0076] Removing fillers, count: Before: 1920, After: 1836 (-4.38%) [INFO GPL-0077] Filler area (um^2) : Before: 4157.453, After: 3975.565 (-4.38%) [INFO GPL-0078] Removed fillers count: 84, area removed: 181.889 um^2. Remaining area to be compensated by modifying density: 0.168 um^2 [INFO GPL-0054] No improvement in routing congestion for 3 consecutive iterations (limit is 3). [INFO GPL-0055] Reverting inflation values and target density from the iteration with minimum observed routing congestion. [INFO GPL-0056] Minimum observed routing congestion: 1.0793 [INFO GPL-0057] Target density at minimum routing congestion: 0.5285 [INFO GPL-0080] Restoring 342 previously removed fillers. [INFO GPL-0081] Number of fillers before restoration 1836 and after 2178 . Relative change: +18.63%% [INFO GPL-0082] Total filler area before restoration 3975.56 and after 4716.11 (um^2). Relative change: +18.63%% [INFO GPL-0089] Routability finished. Reverting to minimal observed routing congestion, could not reach target. Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1820 | 0.6363 | 2.057113e+05 | -21.61% | 1.45e-09 | 1830 | 0.5332 | 2.659722e+05 | +29.29% | 2.11e-09 | 1840 | 0.5061 | 2.669971e+05 | +0.39% | 3.10e-09 | 1850 | 0.4841 | 2.565874e+05 | -3.90% | 4.57e-09 | 1860 | 0.4404 | 2.619295e+05 | +2.08% | 6.73e-09 | 1870 | 0.4121 | 2.620163e+05 | +0.03% | 9.90e-09 | 1880 | 0.3803 | 2.573726e+05 | -1.77% | 1.46e-08 | 1890 | 0.3517 | 2.589123e+05 | +0.60% | 2.15e-08 | 1900 | 0.3181 | 2.588418e+05 | -0.03% | 3.16e-08 | 1910 | 0.2884 | 2.587135e+05 | -0.05% | 4.66e-08 | 1920 | 0.2593 | 2.591214e+05 | +0.16% | 6.86e-08 | 1930 | 0.2313 | 2.595489e+05 | +0.16% | 1.01e-07 | 1940 | 0.2042 | 2.600356e+05 | +0.19% | 1.49e-07 | [INFO GPL-0100] Timing-driven iteration 2/2, virtual: false. [INFO GPL-0101] Iter: 1945, overflow: 0.195, keep resizer changes at: 1, HPWL: 520436924 Iteration | Area | Resized | Buffers | Nets repaired | Remaining --------------------------------------------------------------------- 0 | +0.0% | 0 | 0 | 0 | 17827 final | +0.1% | 3 | 24 | 25 | 0 --------------------------------------------------------------------- [INFO RSZ-0034] Found 3 slew violations. [INFO RSZ-0036] Found 24 capacitance violations. [INFO RSZ-0039] Resized 3 instances. [INFO RSZ-0038] Inserted 24 buffers in 25 nets. Iter | Area | Removed | Inserted | Pins | | Buffers | Buffers | Remaining ------------------------------------------------------- 0 | +0.0% | 0 | 0 | 16199 1600 | +0.1% | 30 | 54 | 14599 3200 | -0.9% | 423 | 232 | 12999 4800 | -1.2% | 704 | 403 | 11399 6400 | -1.3% | 801 | 461 | 9799 8000 | -1.3% | 912 | 577 | 8199 9600 | -1.0% | 1238 | 937 | 6599 11200 | -1.0% | 1271 | 981 | 4999 12800 | -0.8% | 1438 | 1209 | 3399 14400 | -0.8% | 1444 | 1219 | 1799 16000 | -0.8% | 1444 | 1219 | 199 final | -0.7% | 1486 | 1280 | 0 ------------------------------------------------------- [INFO GPL-0106] Timing-driven: worst slack -7.2499995e-10 [INFO GPL-0107] Timing-driven: repair_design delta area: -442.227 um^2 (-1.15%) [INFO GPL-0108] Timing-driven: repair_design, gpl delta gcells: -182 (-1.20%) [INFO GPL-0109] Timing-driven: repair_design, gcells created: 1304, deleted: 1486 [INFO GPL-0110] Timing-driven: new target density: 0.5301721 Iteration | Overflow | HPWL (um) | HPWL(%) | Penalty | Group --------------------------------------------------------------- 1950 | 0.1866 | 2.680515e+05 | +3.08% | 2.19e-07 | 1960 | 0.1622 | 2.653217e+05 | -1.02% | 3.23e-07 | 1970 | 0.1408 | 2.642956e+05 | -0.39% | 4.75e-07 | 1980 | 0.1194 | 2.639960e+05 | -0.11% | 7.00e-07 | 1990 | 0.1042 | 2.642283e+05 | +0.09% | 1.03e-06 | 1993 | 0.0993 | 2.643494e+05 | | 1.20e-06 | --------------------------------------------------------------- [INFO GPL-1001] Global placement finished at iteration 1993 [INFO GPL-1017] Routability mode iteration count: 1576 [INFO GPL-1005] Routability final weighted congestion: 1.0889 [INFO GPL-1002] Placed Cell Area 37576.6166 [INFO GPL-1003] Available Free Area 80834.4740 [INFO GPL-1004] Minimum Feasible Density 0.3700 (cell_area / free_area) [INFO GPL-1006] Suggested Target Densities: [INFO GPL-1007] - For 90% usage of free space: 0.5165 [INFO GPL-1008] - For 80% usage of free space: 0.5811 [INFO GPL-1009] - For 50% usage of free space: 0.9297 [INFO GPL-1011] Original area (um^2): 29617.72 [INFO GPL-1012] Total routability artificial inflation: 6583.28 (+22.23%) [INFO GPL-1013] Total timing-driven delta area: 1375.62 (+4.64%) [INFO GPL-1014] Final placement area: 37576.62 (+26.87%) Took 1406 seconds: global_placement -density 0.5060000038146972 -pad_left 0 -pad_right 0 -routability_driven -timing_driven -force_center_initial_place -min_phi_coef 0.95 -max_phi_coef 1.05 estimate_parasitics -placement Report metrics stage 3, global place... ========================================================================== global place report_design_area -------------------------------------------------------------------------- Design area 29228 um^2 36% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/3_3_place_gp.odb Elapsed time: 23:35.52[h:]min:sec. CPU time: user 6558.12 sys 10.75 (464%). Peak memory: 457332KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 3_3_place_gp .odb 1415 446 ae152c3b458700c2b465 /OpenROAD-flow-scripts/flow/scripts/flow.sh 3_4_place_resized resize Running resize.tcl, stage 3_4_place_resized read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/3_3_place_gp.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl estimate_parasitics -placement Perform buffer insertion and gate resizing... repair_design -verbose Iteration | Area | Resized | Buffers | Nets repaired | Remaining --------------------------------------------------------------------- 0 | +0.0% | 0 | 0 | 0 | 17645 1000 | +0.0% | 0 | 0 | 0 | 16645 2000 | +0.0% | 0 | 0 | 0 | 15645 3000 | +0.0% | 0 | 0 | 0 | 14645 4000 | +0.0% | 0 | 0 | 0 | 13645 5000 | +0.0% | 0 | 0 | 0 | 12645 6000 | +0.0% | 0 | 0 | 0 | 11645 7000 | +0.0% | 0 | 0 | 0 | 10645 8000 | +0.0% | 0 | 0 | 0 | 9645 9000 | +0.0% | 0 | 0 | 0 | 8645 10000 | +0.0% | 0 | 0 | 0 | 7645 11000 | +0.0% | 0 | 0 | 0 | 6645 12000 | +0.0% | 0 | 0 | 0 | 5645 13000 | +0.0% | 0 | 0 | 0 | 4645 14000 | +0.0% | 0 | 0 | 0 | 3645 15000 | +0.0% | 0 | 0 | 0 | 2645 16000 | +0.0% | 0 | 0 | 0 | 1645 17000 | +0.0% | 0 | 0 | 0 | 645 final | +0.0% | 0 | 0 | 0 | 0 --------------------------------------------------------------------- [INFO RSZ-0504] Runtime: 3.12s Floating nets: Report metrics stage 3, resizer... ========================================================================== resizer report_design_area -------------------------------------------------------------------------- Design area 29228 um^2 36% utilization. Instance count before 15594, after 15594 Pin count before 57569, after 57569 write_db ./results/nangate45/ibex/ibex_m4_sp/3_4_place_resized.odb Elapsed time: 0:08.87[h:]min:sec. CPU time: user 13.34 sys 3.44 (189%). Peak memory: 199920KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 3_4_place_resized .odb 8 195 ae152c3b458700c2b465 /OpenROAD-flow-scripts/flow/scripts/flow.sh 3_5_place_dp detail_place Running detail_place.tcl, stage 3_5_place_dp read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/3_4_place_resized.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl detailed_placement [INFO DPL-0006] Core area: 80997.00 um^2, Instances area: 29227.81 um^2, Utilization: 36.1% [INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically. [INFO DPL-1101] Legalizing using diamond search. Movements Summary --------------------------------------- Total cells: 14983 Diamond Move Success: 14983 (100.00%) Diamond Move Failure: 0 Rip-up and replace Success: 0 ( 0.00% of diamond failures) Rip-up and replace Failure: 0 Total Placement Failures: 0 --------------------------------------- [INFO DPL-0500] Runtime: 0.08s Placement Analysis --------------------------------- total displacement 11034.7 u average displacement 0.7 u max displacement 3.2 u original HPWL 264420.4 u legalized HPWL 272117.4 u delta HPWL 3 % improve_placement -max_displacement "5 1" Detailed placement improvement. [INFO DPL-0401] Setting random seed to 1. [INFO DPL-0402] Setting maximum displacement 5 1 to 14000 2800 units. [INFO DPL-0320] Collected 875 fixed cells. [INFO DPL-0318] Collected 14983 single height cells. [INFO DPL-0321] Collected 0 wide cells. [INFO DPL-0322] Image (2280, 2800) - (572280, 571200) [INFO DPL-0310] Assigned 14983 cells into segments. Movement in X-direction is 0.000000, movement in Y-direction is 0.000000. [INFO DPL-0313] Found 0 cells in wrong regions. [INFO DPL-0315] Found 0 row alignment problems. [INFO DPL-0314] Found 0 site alignment problems. [INFO DPL-0311] Found 0 overlaps between adjacent cells. [INFO DPL-0312] Found 0 edge spacing violations and 0 padding violations. [INFO DPL-0303] Running algorithm for independent set matching. [INFO DPL-0300] Set matching objective is wirelength. [INFO DPL-0301] Pass 1 of matching; objective is 5.440350e+08. [INFO DPL-0302] End of matching; objective is 5.439477e+08, improvement is 0.02 percent. [INFO DPL-0303] Running algorithm for global swaps. [INFO DPL-0306] Pass 1 of global swaps; hpwl is 5.382594e+08. [INFO DPL-0306] Pass 2 of global swaps; hpwl is 5.367169e+08. [INFO DPL-0307] End of global swaps; objective is 5.367169e+08, improvement is 1.33 percent. [INFO DPL-0303] Running algorithm for vertical swaps. [INFO DPL-0308] Pass 1 of vertical swaps; hpwl is 5.352154e+08. [INFO DPL-0309] End of vertical swaps; objective is 5.352154e+08, improvement is 0.28 percent. [INFO DPL-0303] Running algorithm for reordering. [INFO DPL-0304] Pass 1 of reordering; objective is 5.349090e+08. [INFO DPL-0305] End of reordering; objective is 5.349090e+08, improvement is 0.06 percent. [INFO DPL-0303] Running algorithm for random improvement. [INFO DPL-0324] Random improver is using random generator. [INFO DPL-0325] Random improver is using hpwl objective. [INFO DPL-0326] Random improver cost string is (a). [INFO DPL-0332] End of pass, Generator random called 299660 times. [INFO DPL-0335] Generator random, Cumulative attempts 299660, swaps 28301, moves 117089 since last reset. [INFO DPL-0333] End of pass, Objective hpwl, Initial cost 5.332032e+08, Scratch cost 5.291946e+08, Incremental cost 5.291946e+08, Mismatch? N [INFO DPL-0338] End of pass, Total cost is 5.291946e+08. [INFO DPL-0327] Pass 1 of random improver; improvement in cost is 0.75 percent. [INFO DPL-0328] End of random improver; improvement is 0.751792 percent. [INFO DPL-0380] Cell flipping. [INFO DPL-0382] Changed 0 cell orientations for row compatibility. [INFO DPL-0383] Performed 4246 cell flips. [INFO DPL-0384] End of flipping; objective is 5.252538e+08, improvement is 1.06 percent. [INFO DPL-0313] Found 0 cells in wrong regions. [INFO DPL-0315] Found 0 row alignment problems. [INFO DPL-0314] Found 0 site alignment problems. [INFO DPL-0311] Found 0 overlaps between adjacent cells. [INFO DPL-0312] Found 0 edge spacing violations and 0 padding violations. Detailed Improvement Results ------------------------------------------ Original HPWL 272117.4 u ( 131777.7, 140339.7) Final HPWL 262753.7 u ( 126213.1, 136540.5) Delta HPWL -3.4 % ( -4.2, -2.7) optimize_mirroring [INFO DPL-0020] Mirrored 738 instances [INFO DPL-0021] HPWL before 262753.7 u [INFO DPL-0022] HPWL after 262671.0 u [INFO DPL-0023] HPWL delta -0.0 % [INFO FLW-0012] Placement violations . estimate_parasitics -placement Report metrics stage 3, detailed place... ========================================================================== detailed place report_design_area -------------------------------------------------------------------------- Design area 29228 um^2 36% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/3_5_place_dp.odb Elapsed time: 0:11.35[h:]min:sec. CPU time: user 12.95 sys 0.75 (120%). Peak memory: 230872KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 3_5_place_dp .odb 11 225 58a19acdca1ddbbd3719 cp ./results/nangate45/ibex/ibex_m4_sp/3_5_place_dp.odb ./results/nangate45/ibex/ibex_m4_sp/3_place.odb cp ./results/nangate45/ibex/ibex_m4_sp/2_floorplan.sdc ./results/nangate45/ibex/ibex_m4_sp/3_place.sdc /OpenROAD-flow-scripts/flow/scripts/flow.sh 4_1_cts cts Running cts.tcl, stage 4_1_cts read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/3_place.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/3_place.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl clock_tree_synthesis -sink_clustering_enable -repair_clock_nets [INFO CTS-0050] Root buffer is CLKBUF_X3. [INFO CTS-0051] Sink buffer is CLKBUF_X3. [INFO CTS-0052] The following clock buffers will be used for CTS: CLKBUF_X3 [INFO CTS-0049] Characterization buffer is CLKBUF_X3. [INFO CTS-0007] Net "clk_i" found for clock "core_clock". [INFO CTS-0011] Clock net "clk_i" for macros has 1 sinks. [INFO CTS-0011] Clock net "clk_i_regs" for registers has 995 sinks. [INFO CTS-0010] Clock net "clk" has 943 sinks. [INFO CTS-0008] TritonCTS found 3 clock nets. [INFO CTS-0097] Characterization used 1 buffer(s) types. [INFO CTS-0201] 0 blockages from hard placement blockages and placed macros will be used. [INFO CTS-0027] Generating H-Tree topology for net clk_i. [INFO CTS-0028] Total number of sinks: 1. [INFO CTS-0060] Macro sinks will be clustered in groups of up to 4 and based on buffer max cap. [INFO CTS-0030] Number of static layers: 0. [INFO CTS-0020] Wire segment unit: 14000 dbu (7 um). [INFO CTS-0023] Original sink region: [(373980, 286950), (373980, 286950)]. [INFO CTS-0024] Normalized sink region: [(26.7129, 20.4964), (26.7129, 20.4964)]. [INFO CTS-0025] Width: 0.0000. [INFO CTS-0026] Height: 0.0000. Level 1 Direction: Vertical Sinks per sub-region: 1 Sub-region size: 0.0000 X 0.0000 [INFO CTS-0034] Segment length (rounded): 1. [INFO CTS-0032] Stop criterion found. Max number of sinks is 15. [INFO CTS-0035] Number of sinks covered: 1. [INFO CTS-0201] 0 blockages from hard placement blockages and placed macros will be used. [INFO CTS-0027] Generating H-Tree topology for net clk_i_regs. [INFO CTS-0028] Total number of sinks: 995. [INFO CTS-0090] Sinks will be clustered based on buffer max cap. [INFO CTS-0030] Number of static layers: 0. [INFO CTS-0020] Wire segment unit: 14000 dbu (7 um). [INFO CTS-0206] Best clustering solution was found from max clustering size of 9 and max clustering diameter of 32. [INFO CTS-0019] Total number of sinks after clustering: 137. [INFO CTS-0024] Normalized sink region: [(0.42699, 2.85), (17.8596, 36.6656)]. [INFO CTS-0025] Width: 17.4327. [INFO CTS-0026] Height: 33.8156. Level 1 Direction: Vertical Sinks per sub-region: 69 Sub-region size: 17.4327 X 16.9078 [INFO CTS-0034] Segment length (rounded): 8. Level 2 Direction: Horizontal Sinks per sub-region: 35 Sub-region size: 8.7163 X 16.9078 [INFO CTS-0034] Segment length (rounded): 4. Level 3 Direction: Vertical Sinks per sub-region: 18 Sub-region size: 8.7163 X 8.4539 [INFO CTS-0034] Segment length (rounded): 4. Level 4 Direction: Horizontal Sinks per sub-region: 9 Sub-region size: 4.3582 X 8.4539 [INFO CTS-0034] Segment length (rounded): 2. [INFO CTS-0032] Stop criterion found. Max number of sinks is 15. [INFO CTS-0035] Number of sinks covered: 137. [INFO CTS-0201] 0 blockages from hard placement blockages and placed macros will be used. [INFO CTS-0027] Generating H-Tree topology for net clk. [INFO CTS-0028] Total number of sinks: 943. [INFO CTS-0090] Sinks will be clustered based on buffer max cap. [INFO CTS-0030] Number of static layers: 0. [INFO CTS-0020] Wire segment unit: 14000 dbu (7 um). [INFO CTS-0206] Best clustering solution was found from max clustering size of 9 and max clustering diameter of 42. [INFO CTS-0019] Total number of sinks after clustering: 148. [INFO CTS-0024] Normalized sink region: [(12.8251, 1.15194), (40.4719, 39.9333)]. [INFO CTS-0025] Width: 27.6468. [INFO CTS-0026] Height: 38.7814. Level 1 Direction: Vertical Sinks per sub-region: 74 Sub-region size: 27.6468 X 19.3907 [INFO CTS-0034] Segment length (rounded): 10. Level 2 Direction: Horizontal Sinks per sub-region: 37 Sub-region size: 13.8234 X 19.3907 [INFO CTS-0034] Segment length (rounded): 6. Level 3 Direction: Vertical Sinks per sub-region: 19 Sub-region size: 13.8234 X 9.6953 [INFO CTS-0034] Segment length (rounded): 4. Level 4 Direction: Horizontal Sinks per sub-region: 10 Sub-region size: 6.9117 X 9.6953 [INFO CTS-0034] Segment length (rounded): 4. [INFO CTS-0032] Stop criterion found. Max number of sinks is 15. [INFO CTS-0035] Number of sinks covered: 148. [INFO CTS-0018] Created 2 clock buffers. [INFO CTS-0012] Minimum number of buffers in the clock path: 2. [INFO CTS-0013] Maximum number of buffers in the clock path: 2. [INFO CTS-0015] Created 2 clock nets. [INFO CTS-0016] Fanout distribution for the current clock = 1:1.. [INFO CTS-0017] Max level of the clock tree: 1. [INFO CTS-0018] Created 154 clock buffers. [INFO CTS-0012] Minimum number of buffers in the clock path: 3. [INFO CTS-0013] Maximum number of buffers in the clock path: 3. [INFO CTS-0015] Created 154 clock nets. [INFO CTS-0016] Fanout distribution for the current clock = 2:1, 3:2, 4:3, 5:2, 6:12, 7:59, 8:54, 9:15, 10:5.. [INFO CTS-0017] Max level of the clock tree: 4. [INFO CTS-0018] Created 173 clock buffers. [INFO CTS-0012] Minimum number of buffers in the clock path: 4. [INFO CTS-0013] Maximum number of buffers in the clock path: 4. [INFO CTS-0015] Created 173 clock nets. [INFO CTS-0016] Fanout distribution for the current clock = 2:1, 3:1, 4:6, 5:20, 6:51, 7:55, 8:20, 9:3, 10:1, 11:3, 12:1, 13:1, 16:1.. [INFO CTS-0017] Max level of the clock tree: 4. [INFO CTS-0124] Clock net "clk_i" [INFO CTS-0125] Sinks 1 [INFO CTS-0098] Clock net "clk_i_regs" [INFO CTS-0099] Sinks 1106 [INFO CTS-0100] Leaf buffers 137 [INFO CTS-0101] Average sink wire length 113.96 um [INFO CTS-0102] Path depth 2 - 3 [INFO CTS-0207] Dummy loads inserted 111 [INFO CTS-0098] Clock net "clk" [INFO CTS-0099] Sinks 1070 [INFO CTS-0100] Leaf buffers 148 [INFO CTS-0101] Average sink wire length 192.31 um [INFO CTS-0102] Path depth 3 - 4 [INFO CTS-0207] Dummy loads inserted 127 [INFO CTS-0033] Balancing latency for clock core_clock [INFO CTS-0036] inserted 2 delay buffers [INFO CTS-0037] Total number of delay buffers: 2 [INFO CTS-0500] Runtime: 2.87s estimate_parasitics -placement detailed_placement [INFO DPL-0006] Core area: 80997.00 um^2, Instances area: 29850.79 um^2, Utilization: 36.9% [INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically. [INFO DPL-1101] Legalizing using diamond search. Movements Summary --------------------------------------- Total cells: 15553 Diamond Move Success: 15553 (100.00%) Diamond Move Failure: 0 Rip-up and replace Success: 0 ( 0.00% of diamond failures) Rip-up and replace Failure: 0 Total Placement Failures: 0 --------------------------------------- [INFO DPL-0500] Runtime: 0.12s Placement Analysis --------------------------------- total displacement 659.8 u average displacement 0.0 u max displacement 3.5 u original HPWL 272784.5 u legalized HPWL 275881.8 u delta HPWL 1 % estimate_parasitics -placement repair_timing -setup_margin 0 -hold_margin 0 -repair_tns 100 -verbose [INFO RSZ-0100] Repair move sequence: UnbufferMove SizeUpMove SwapPinsMove BufferMove CloneMove SplitLoadMove [INFO RSZ-0094] Found 92 endpoints with setup violations. [INFO RSZ-0099] Repairing 92 out of 92 (100.00%) violating endpoints... Iter | Removed | Resized | Inserted | Cloned | Pin | Area | WNS | StTNS | EnTNS | Viol | Worst | Buffers | Gates | Buffers | Gates | Swaps | | | | | Endpts | St/EnPt ------------------------------------------------------------------------------------------------------------------------------ 0* | 0 | 0 | 0 | 0 | 0 | +0.0% | -0.040 | -5.8 | -1.8 | 92 | gen_regfile_ff.register_file_i.rf_reg\[92\]$_DFFE_PN0P_/D 10* | 0 | 7 | 2 | 0 | 0 | +0.0% | -0.002 | -5.8 | -0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[92\]$_DFFE_PN0P_/D 10* | 0 | 7 | 2 | 0 | 0 | +0.0% | -0.002 | -5.8 | -0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[92\]$_DFFE_PN0P_/D 13* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 14* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 15* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 16* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 17* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 18* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 19* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 20* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 20* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 21* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 22* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 23* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 24* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 25* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 26* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 27* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 28* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 29* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 30* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 30* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 31* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 32* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 33* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 34* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 35* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 36* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 37* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 38* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 39* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 40* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 40* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 41* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 42* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 43* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 44* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 45* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 46* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 47* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 48* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 49* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 50* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 50* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 51* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 52* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 53* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 54* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 55* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 56* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 57* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 58* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 59* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 60* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 60* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 61* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 62* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 63* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 64* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 65* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 66* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 67* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 68* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 69* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 70* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 70* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 71* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 72* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 73* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 74* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 75* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 76* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 77* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 78* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 79* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 80* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 80* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 81* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 82* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 83* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 84* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 85* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 86* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 87* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 88* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 89* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 90* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 90* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 91* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 92* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 93* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 94* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 95* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 96* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 97* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 98* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 99* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 100* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 100* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 101* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 102* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 103* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D 103* | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 92 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D final | 0 | 9 | 2 | 0 | 0 | +0.0% | 0.001 | -5.8 | 0.0 | 0 | gen_regfile_ff.register_file_i.rf_reg\[958\]$_DFFE_PN0P_/D ------------------------------------------------------------------------------------------------------------------------------ [INFO RSZ-0040] Inserted 2 buffers. [INFO RSZ-0051] Resized 9 instances: 9 up, 0 up match, 0 down, 0 VT [INFO RSZ-0505] Runtime: 4.56s [INFO RSZ-0033] No hold violations found. [INFO RSZ-0506] Runtime: 0.04s Took 5 seconds: repair_timing -setup_margin 0 -hold_margin 0 -repair_tns 100 -verbose Repair timing output passed lec test detailed_placement [INFO DPL-0006] Core area: 80997.00 um^2, Instances area: 29861.96 um^2, Utilization: 36.9% [INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically. [INFO DPL-1101] Legalizing using diamond search. Movements Summary --------------------------------------- Total cells: 15555 Diamond Move Success: 15555 (100.00%) Diamond Move Failure: 0 Rip-up and replace Success: 0 ( 0.00% of diamond failures) Rip-up and replace Failure: 0 Total Placement Failures: 0 --------------------------------------- [INFO DPL-0500] Runtime: 0.08s Placement Analysis --------------------------------- total displacement 4.2 u average displacement 0.0 u max displacement 1.4 u original HPWL 275913.9 u legalized HPWL 275915.6 u delta HPWL 0 % Report metrics stage 4, cts final... ========================================================================== cts final report_design_area -------------------------------------------------------------------------- Design area 29862 um^2 37% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/4_1_cts.odb write_sdc -no_timestamp ./results/nangate45/ibex/ibex_m4_sp/4_cts.sdc Elapsed time: 0:20.11[h:]min:sec. CPU time: user 34.54 sys 1.52 (179%). Peak memory: 285368KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 4_1_cts .odb 20 278 67baf27a132ecb16d309 cp ./results/nangate45/ibex/ibex_m4_sp/4_1_cts.odb ./results/nangate45/ibex/ibex_m4_sp/4_cts.odb /OpenROAD-flow-scripts/flow/scripts/flow.sh 5_1_grt global_route Running global_route.tcl, stage 5_1_grt read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/4_cts.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/4_cts.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl pin_access [INFO DRT-0149] Reading tech and libs. Units: 2000 Number of layers: 21 Number of macros: 135 Number of vias: 33 Number of viarulegen: 19 [INFO DRT-0150] Reading design. Design: ibex_core Die area: ( 0 0 ) ( 574570 574570 ) Number of track patterns: 20 Number of DEF vias: 0 Number of components: 16166 Number of terminals: 266 Number of snets: 2 Number of nets: 17979 [INFO DRT-0167] List of default vias: Layer via2 default via: via2_5 Layer via3 default via: via3_2 Layer via4 default via: via4_0 Layer via5 default via: via5_0 Layer via6 default via: via6_0 Layer via7 default via: via7_0 Layer via8 default via: via8_0 Layer via9 default via: via9_0 [INFO DRT-0162] Library cell analysis. [INFO DRT-0163] Instance analysis. [INFO DRT-0164] Number of unique instances = 158. [INFO DRT-0168] Init region query. [INFO DRT-0024] Complete active. [INFO DRT-0024] Complete Fr_VIA. [INFO DRT-0024] Complete metal1. [INFO DRT-0024] Complete via1. [INFO DRT-0024] Complete metal2. [INFO DRT-0024] Complete via2. [INFO DRT-0024] Complete metal3. [INFO DRT-0024] Complete via3. [INFO DRT-0024] Complete metal4. [INFO DRT-0024] Complete via4. [INFO DRT-0024] Complete metal5. [INFO DRT-0024] Complete via5. [INFO DRT-0024] Complete metal6. [INFO DRT-0024] Complete via6. [INFO DRT-0024] Complete metal7. [INFO DRT-0024] Complete via7. [INFO DRT-0024] Complete metal8. [INFO DRT-0024] Complete via8. [INFO DRT-0024] Complete metal9. [INFO DRT-0024] Complete via9. [INFO DRT-0024] Complete metal10. [INFO DRT-0033] active shape region query size = 0. [INFO DRT-0033] FR_VIA shape region query size = 0. [INFO DRT-0033] metal1 shape region query size = 344025. [INFO DRT-0033] via1 shape region query size = 3366. [INFO DRT-0033] metal2 shape region query size = 2244. [INFO DRT-0033] via2 shape region query size = 3366. [INFO DRT-0033] metal3 shape region query size = 2244. [INFO DRT-0033] via3 shape region query size = 3366. [INFO DRT-0033] metal4 shape region query size = 1502. [INFO DRT-0033] via4 shape region query size = 1050. [INFO DRT-0033] metal5 shape region query size = 210. [INFO DRT-0033] via5 shape region query size = 1050. [INFO DRT-0033] metal6 shape region query size = 210. [INFO DRT-0033] via6 shape region query size = 420. [INFO DRT-0033] metal7 shape region query size = 143. [INFO DRT-0033] via7 shape region query size = 0. [INFO DRT-0033] metal8 shape region query size = 0. [INFO DRT-0033] via8 shape region query size = 0. [INFO DRT-0033] metal9 shape region query size = 0. [INFO DRT-0033] via9 shape region query size = 0. [INFO DRT-0033] metal10 shape region query size = 0. [INFO DRT-0165] Start pin access. [INFO DRT-0078] Complete 948 pins. [INFO DRT-0079] Complete 100 unique inst patterns. [INFO DRT-0081] Complete 158 unique inst patterns. [INFO DRT-0082] Complete 10000 groups. [INFO DRT-0084] Complete 10009 groups. #scanned instances = 16166 #unique instances = 158 #stdCellGenAp = 5895 #stdCellValidPlanarAp = 0 #stdCellValidViaAp = 4039 #stdCellPinNoAp = 0 #stdCellPinCnt = 58475 #instTermValidViaApCnt = 0 #macroGenAp = 0 #macroValidPlanarAp = 0 #macroValidViaAp = 0 #macroNoAp = 0 [INFO DRT-0166] Complete pin access. [INFO DRT-0267] cpu time = 00:02:46, elapsed time = 00:00:16, memory = 182.22 (MB), peak = 180.48 (MB) Took 16 seconds: pin_access global_route -congestion_report_file ./reports/nangate45/ibex/ibex_m4_sp/congestion.rpt -congestion_iterations 30 -congestion_report_iter_step 5 -verbose [INFO GRT-0020] Min routing layer: metal2 [INFO GRT-0021] Max routing layer: metal4 [INFO GRT-0022] Global adjustment: 0% [INFO GRT-0023] Grid origin: (0, 0) [INFO GRT-0088] Layer metal1 Track-Pitch = 0.1400 line-2-Via Pitch: 0.1350 [INFO GRT-0088] Layer metal2 Track-Pitch = 0.1900 line-2-Via Pitch: 0.1400 [INFO GRT-0088] Layer metal3 Track-Pitch = 0.1400 line-2-Via Pitch: 0.1400 [INFO GRT-0088] Layer metal4 Track-Pitch = 0.2800 line-2-Via Pitch: 0.2800 [INFO GRT-0003] Macros: 0 [INFO GRT-0004] Blockages: 0 [INFO GRT-0019] Found 334 clock nets. [INFO GRT-0001] Minimum degree: 2 [INFO GRT-0002] Maximum degree: 89 [INFO GRT-0053] Routing resources analysis: Routing Original Derated Resource Layer Direction Resources Resources Reduction (%) --------------------------------------------------------------- metal1 Horizontal 0 0 0.00% metal2 Vertical 146322 68805 52.98% metal3 Horizontal 202083 99117 50.95% metal4 Vertical 99198 70191 29.24% --------------------------------------------------------------- [INFO GRT-0101] Running extra iterations to remove congestion. [INFO GRT-0102] Start extra iteration 1/30 [INFO GRT-0102] Start extra iteration 2/30 [INFO GRT-0102] Start extra iteration 3/30 [INFO GRT-0102] Start extra iteration 4/30 [INFO GRT-0197] Via related to pin nodes: 99057 [INFO GRT-0198] Via related Steiner nodes: 2332 [INFO GRT-0199] Via filling finished. [INFO GRT-0111] Final number of vias: 126685 [INFO GRT-0112] Final usage 3D: 498281 [INFO GRT-0096] Final congestion report: Layer Resource Demand Usage (%) Max H / Max V / Total Congestion --------------------------------------------------------------------------------------- metal1 0 0 0.00% 0 / 0 / 0 metal2 68805 42307 61.49% 0 / 0 / 0 metal3 99117 55190 55.68% 0 / 0 / 0 metal4 70191 20729 29.53% 0 / 0 / 0 --------------------------------------------------------------------------------------- Total 238113 118226 49.65% 0 / 0 / 0 [INFO GRT-0018] Total wirelength: 467816 um [INFO GRT-0014] Routed nets: 16113 [INFO GRT-0303] Global routing runtime = 00:00:04 Took 5 seconds: global_route -congestion_report_file ./reports/nangate45/ibex/ibex_m4_sp/congestion.rpt -congestion_iterations 30 -congestion_report_iter_step 5 -verbose [WARNING STA-0450] virtual clock vclk_core_clock can not be propagated. estimate_parasitics -global_routing Perform buffer insertion and gate resizing... repair_design -verbose Iteration | Area | Resized | Buffers | Nets repaired | Remaining --------------------------------------------------------------------- 0 | +0.0% | 0 | 0 | 0 | 18217 1000 | +0.0% | 0 | 0 | 0 | 17217 2000 | +0.0% | 0 | 0 | 0 | 16217 3000 | +0.0% | 0 | 0 | 0 | 15217 [WARNING RSZ-0104] Net _15000_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14999_ only has one pin. Check if it is intended to be dangling. 4000 | +0.0% | 0 | 0 | 0 | 14217 5000 | +0.0% | 0 | 1 | 1 | 13217 [WARNING RSZ-0104] Net _14998_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14997_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14996_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14995_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14994_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14993_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14992_ only has one pin. Check if it is intended to be dangling. 6000 | +0.0% | 0 | 1 | 1 | 12217 [WARNING RSZ-0104] Net _14945_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14924_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14951_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14927_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14949_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14948_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14944_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14943_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14942_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14940_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14939_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14938_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14937_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14936_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14935_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14934_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14932_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14930_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14923_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14922_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14921_ only has one pin. Check if it is intended to be dangling. 7000 | +0.0% | 0 | 1 | 1 | 11217 [WARNING RSZ-0104] Net _15001_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14950_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14947_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14946_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14941_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14933_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14931_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14929_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14928_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14926_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14925_ only has one pin. Check if it is intended to be dangling. 8000 | +0.0% | 0 | 1 | 1 | 10217 [WARNING RSZ-0104] Net _14979_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14978_ only has one pin. Check if it is intended to be dangling. 9000 | +0.0% | 0 | 1 | 1 | 9217 [WARNING RSZ-0104] Net _14977_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14986_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14985_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14984_ only has one pin. Check if it is intended to be dangling. 10000 | +0.0% | 0 | 1 | 1 | 8217 [WARNING RSZ-0104] Net _14983_ only has one pin. Check if it is intended to be dangling. 11000 | +0.0% | 0 | 1 | 1 | 7217 12000 | +0.0% | 0 | 1 | 1 | 6217 [WARNING RSZ-0104] Net _14991_ only has one pin. Check if it is intended to be dangling. 13000 | +0.0% | 0 | 1 | 1 | 5217 [WARNING RSZ-0104] Net _13790_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13789_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12354_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13811_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13810_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13809_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13808_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13807_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13806_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13805_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13804_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13803_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13802_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13801_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13800_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13799_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13798_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13797_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13796_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13795_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13794_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13793_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13792_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13791_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12414_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14122_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12355_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13821_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13820_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13819_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13818_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13817_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13816_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13815_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12411_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13842_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13814_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13841_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13840_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13839_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13838_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13837_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13836_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13835_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13834_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13833_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13832_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13813_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13831_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13830_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13829_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13828_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13827_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13826_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13825_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13824_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13823_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13822_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13812_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12506_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12505_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12504_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12503_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12502_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12501_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12500_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12360_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12527_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12499_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12526_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12525_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12524_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12523_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12522_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12521_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12520_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12519_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12518_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12517_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12516_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12515_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12514_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12513_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12512_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12511_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12510_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12509_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12508_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12507_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12357_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12368_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12629_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12628_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12627_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12626_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12625_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12624_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12639_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12638_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12637_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12636_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12635_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12634_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12633_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12632_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12631_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12348_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12644_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12643_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12642_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12641_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12640_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12630_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12362_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12836_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12835_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12834_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12833_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12832_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12831_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12830_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12371_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12857_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12829_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12856_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12855_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12854_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12853_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12852_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12851_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12850_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12849_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12848_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12847_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12846_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12845_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12844_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12843_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12842_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12841_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12840_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12839_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12838_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12837_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14123_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12714_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12392_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12797_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12796_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12795_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12794_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12793_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12713_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12792_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12791_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12790_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12789_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12788_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12787_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12786_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12785_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12784_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12783_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12712_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12782_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12781_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12780_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12779_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12778_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12777_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12776_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12775_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12774_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12773_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12711_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12772_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12771_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12770_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12769_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12768_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12767_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12397_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12766_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12765_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12764_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12710_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12763_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12762_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12761_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12760_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12759_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12758_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12757_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12756_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12755_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12754_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12709_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12753_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12752_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12751_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12750_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12749_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12748_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12747_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12746_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12745_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12744_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12708_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12743_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12742_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12741_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12740_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12739_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12738_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12737_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12736_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12372_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12735_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12707_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12734_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12733_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12732_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12731_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12730_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12729_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12728_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12727_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12726_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12725_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12706_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12724_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12723_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12722_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12721_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12720_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12719_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12718_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12717_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12716_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12715_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12705_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12652_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12651_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12650_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12649_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12648_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12647_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12646_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12406_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12673_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12672_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12671_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12670_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12669_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12668_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12667_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12666_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12665_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12664_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12663_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12645_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12662_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12661_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12660_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12659_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12658_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12657_ only has one pin. Check if it is intended to be dangling. 14000 | +0.0% | 0 | 1 | 1 | 4217 [WARNING RSZ-0104] Net _12656_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12655_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12654_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12653_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12350_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12367_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12421_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12420_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12419_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12418_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12417_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12416_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12415_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12413_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12442_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14139_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12441_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12440_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12439_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12438_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12437_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12436_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12435_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12434_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12433_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12432_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12431_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12430_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12429_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12428_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12427_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12426_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12425_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12424_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12423_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12422_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14151_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14150_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12373_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12858_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12385_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14147_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14146_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14145_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14124_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14125_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14126_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14127_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14128_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14129_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14130_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12390_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14038_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14037_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14036_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14035_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14034_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14033_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14032_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12408_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14059_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14031_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14058_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14057_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14056_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14055_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14054_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14053_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14052_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14051_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14050_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14049_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14030_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14048_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14047_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14046_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14045_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14044_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14043_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14042_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14041_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14040_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14039_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14029_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14069_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14068_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14067_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14066_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14065_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14064_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14063_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12409_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14090_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14062_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14089_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14088_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14087_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14086_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14085_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14084_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14083_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14082_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14081_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14080_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14061_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14079_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14078_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14077_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14076_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14075_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14074_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14073_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14072_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14071_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14070_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14060_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14140_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14131_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14132_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14133_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14134_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14135_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14141_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14136_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14137_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14138_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12444_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12443_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12361_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12465_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12464_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12463_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12462_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12461_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12460_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12459_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12458_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12457_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12456_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12455_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12454_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12453_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12452_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12451_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12450_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12449_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12448_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12447_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12446_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12445_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13142_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13141_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13140_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13139_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13138_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13137_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13136_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12383_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13163_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13135_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13162_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13161_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13160_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13159_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13158_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13157_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13156_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13155_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13154_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13153_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13134_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13152_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13151_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13150_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13149_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13148_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13147_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13146_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13145_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13144_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13143_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13133_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12380_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13047_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13046_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13045_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12389_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13048_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13237_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13236_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13235_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13234_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13233_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13232_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13231_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14148_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13258_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13230_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13257_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13256_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13255_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13254_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13253_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13252_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13251_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13250_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13249_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13248_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13229_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13247_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13246_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13245_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13244_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13243_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13242_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13241_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13240_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13239_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13238_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13228_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12349_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13227_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13226_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12399_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13263_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13262_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13261_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13260_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13259_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13106_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13105_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13104_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13103_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13102_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13101_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13100_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12364_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13127_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13099_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13126_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13125_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13124_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13123_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13122_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13121_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13120_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13119_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13118_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13117_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13098_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13116_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13115_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13114_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13113_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13112_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13111_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13110_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13109_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13108_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13107_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13097_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13089_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13088_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13087_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13086_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13085_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13084_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13083_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13082_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13081_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12363_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13096_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13095_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13094_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13093_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13092_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13091_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13090_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13080_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13058_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13057_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13056_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13055_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13054_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13053_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13052_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12359_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13079_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13051_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13078_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13077_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13076_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13075_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13074_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13073_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13072_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13071_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13070_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13069_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13050_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13068_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13067_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13066_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13065_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13064_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13063_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13062_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13061_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13060_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13059_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13049_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12366_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13132_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13131_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13130_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13129_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13128_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13204_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13203_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13202_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13201_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13200_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13199_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13198_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12352_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13225_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13197_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13224_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13223_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13222_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13221_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13220_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13219_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13218_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13217_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13216_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13215_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13196_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13214_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13213_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13212_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13211_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13210_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13209_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13208_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13207_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13206_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13205_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13195_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13173_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13172_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13171_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13170_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13169_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13168_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13167_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12370_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13194_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13166_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13193_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13192_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13191_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13190_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13189_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13188_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13187_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13186_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13185_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13184_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13165_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13183_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13182_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13181_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13180_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13179_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13178_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13177_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13176_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13175_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13174_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13164_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12474_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12473_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12472_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12471_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12470_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12469_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12468_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14144_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12495_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12467_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12494_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12493_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12492_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12491_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12490_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12489_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12488_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12487_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12486_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12485_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12466_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12484_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12483_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12482_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12481_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12480_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12479_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12478_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12477_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12476_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12475_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12386_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12498_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12497_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12344_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12356_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12530_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12529_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12528_ only has one pin. Check if it is intended to be dangling. 15000 | +0.0% | 0 | 1 | 1 | 3217 [WARNING RSZ-0104] Net _12496_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13736_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13735_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13734_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13733_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14149_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13788_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13787_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13786_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13732_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13785_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13784_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13783_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13782_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13781_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13780_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13779_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13778_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13777_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13776_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13731_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13775_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13774_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13773_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13772_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13771_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13770_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13769_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13768_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13767_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13766_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13730_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13765_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13764_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13763_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13762_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13761_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13760_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13759_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13758_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12384_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13757_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13729_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13756_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13755_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13754_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13753_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13752_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13751_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13750_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13749_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13748_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13747_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13728_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13746_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13745_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13744_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13743_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13742_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13741_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13740_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13739_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13738_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13737_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13675_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13674_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13673_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13672_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12382_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13727_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13726_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13725_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13671_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13724_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13723_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13722_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13721_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13720_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13719_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13718_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13717_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13716_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13715_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13670_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13714_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13713_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13712_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13711_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13710_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13709_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13708_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13707_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13706_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13705_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13669_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13704_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13703_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13702_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13701_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13700_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13699_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13698_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13697_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12381_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13696_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13668_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13695_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13694_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13693_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13692_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13691_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13690_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13689_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13688_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13687_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13686_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13667_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13685_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13684_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13683_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13682_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13681_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13680_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13679_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13678_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13677_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13676_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12369_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13908_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13488_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13487_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13486_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13485_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13484_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13483_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13482_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13481_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12400_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14028_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13907_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14027_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14026_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14025_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14024_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14023_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14022_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14021_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14020_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14019_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14018_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13906_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14017_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14016_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14015_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14014_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14013_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14012_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14011_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14010_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14009_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14008_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13905_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14007_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14006_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14005_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14004_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14003_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14002_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14001_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _14000_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13999_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13998_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12401_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12378_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13635_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13634_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13633_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13632_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13631_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13630_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13629_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13628_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13627_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13997_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13626_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13625_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13624_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13623_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13622_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13621_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13620_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13619_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13618_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13617_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13996_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13616_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13615_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13614_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13613_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13612_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13611_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13610_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13609_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13608_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13607_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13995_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13606_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13605_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12393_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13325_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13324_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13323_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13322_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13321_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13320_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13319_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13994_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13318_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13317_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13316_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13315_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13314_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13313_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13312_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13311_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13310_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13309_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13993_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13308_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13307_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13306_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13305_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13304_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13303_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13302_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13301_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13300_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13299_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13992_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13298_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13297_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13296_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13295_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12347_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12828_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12827_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12826_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12825_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12824_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13991_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12823_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12822_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12821_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12820_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12819_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12818_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12817_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12816_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12815_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12814_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _13990_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12813_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12812_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] Net _12811_ only has one pin. Check if it is intended to be dangling. [WARNING RSZ-0104] message limit (1000) reached. This message will no longer print. 16000 | +0.0% | 0 | 1 | 1 | 2217 17000 | +0.0% | 0 | 1 | 1 | 1217 18000 | +0.0% | 0 | 1 | 1 | 217 final | +0.0% | 0 | 1 | 1 | 0 --------------------------------------------------------------------- [INFO RSZ-0036] Found 1 capacitance violations. [INFO RSZ-0038] Inserted 1 buffers in 1 nets. [INFO RSZ-0504] Runtime: 130.08s Took 130 seconds: repair_design -verbose global_route -start_incremental detailed_placement [INFO DPL-0006] Core area: 80997.00 um^2, Instances area: 29863.02 um^2, Utilization: 36.9% [INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically. [INFO DPL-1101] Legalizing using diamond search. Movements Summary --------------------------------------- Total cells: 15556 Diamond Move Success: 15556 (100.00%) Diamond Move Failure: 0 Rip-up and replace Success: 0 ( 0.00% of diamond failures) Rip-up and replace Failure: 0 Total Placement Failures: 0 --------------------------------------- [INFO DPL-0500] Runtime: 0.12s Placement Analysis --------------------------------- total displacement 0.8 u average displacement 0.0 u max displacement 0.8 u original HPWL 275915.2 u legalized HPWL 275915.1 u delta HPWL 0 % global_route -end_incremental -congestion_report_file ./reports/nangate45/ibex/ibex_m4_sp/congestion_post_repair_design.rpt Repair setup and hold violations... estimate_parasitics -global_routing repair_timing -setup_margin 0 -hold_margin 0 -repair_tns 100 -verbose [INFO RSZ-0100] Repair move sequence: UnbufferMove SizeUpMove SwapPinsMove BufferMove CloneMove SplitLoadMove [INFO RSZ-0094] Found 641 endpoints with setup violations. [INFO RSZ-0099] Repairing 641 out of 641 (100.00%) violating endpoints... Iter | Removed | Resized | Inserted | Cloned | Pin | Area | WNS | StTNS | EnTNS | Viol | Worst | Buffers | Gates | Buffers | Gates | Swaps | | | | | Endpts | St/EnPt ------------------------------------------------------------------------------------------------------------------------------ 0* | 0 | 0 | 0 | 0 | 0 | +0.0% | -0.071 | -6.0 | -21.4 | 641 | gen_regfile_ff.register_file_i.rf_reg\[92\]$_DFFE_PN0P_/D 10* | 0 | 9 | 0 | 0 | 0 | +0.0% | -0.045 | -5.9 | -13.8 | 641 | gen_regfile_ff.register_file_i.rf_reg\[501\]$_DFFE_PN0P_/D 20* | 0 | 18 | 1 | 0 | 0 | +0.1% | -0.048 | -5.9 | -12.5 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 30* | 0 | 27 | 1 | 0 | 1 | +0.1% | -0.035 | -5.9 | -8.6 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 40* | 0 | 36 | 2 | 0 | 1 | +0.1% | -0.027 | -5.8 | -4.4 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 50* | 0 | 44 | 3 | 0 | 2 | +0.2% | -0.023 | -5.8 | -3.7 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 60* | 0 | 52 | 4 | 0 | 3 | +0.2% | -0.015 | -5.8 | -1.2 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 69* | 0 | 61 | 4 | 0 | 3 | +0.2% | -0.011 | -5.8 | -0.6 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 70* | 0 | 61 | 4 | 0 | 3 | +0.2% | -0.011 | -5.8 | -0.6 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 77* | 0 | 64 | 4 | 0 | 3 | +0.2% | -0.011 | -5.8 | -0.4 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 80* | 0 | 65 | 4 | 0 | 4 | +0.2% | -0.017 | -5.8 | -0.8 | 641 | gen_regfile_ff.register_file_i.rf_reg\[92\]$_DFFE_PN0P_/D 83* | 0 | 64 | 4 | 0 | 3 | +0.2% | -0.011 | -5.8 | -0.4 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 86* | 0 | 66 | 4 | 0 | 3 | +0.2% | -0.011 | -5.8 | -0.4 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 87* | 0 | 66 | 4 | 0 | 3 | +0.2% | -0.011 | -5.8 | -0.4 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 90* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 91* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 93* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 94* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 96* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 97* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 98* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 99* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 100* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 100* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 101* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 102* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 103* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 104* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 105* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 106* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 107* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 108* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 109* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 110* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 110* | 0 | 67 | 4 | 0 | 4 | +0.2% | -0.011 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 113* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 114* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 115* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 116* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 117* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 118* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 119* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 120* | 0 | 68 | 4 | 0 | 5 | +0.2% | -0.010 | -5.8 | -0.3 | 641 | gen_regfile_ff.register_file_i.rf_reg\[989\]$_DFFE_PN0P_/D 130* | 0 | 75 | 4 | 0 | 8 | +0.2% | -0.007 | -5.8 | -0.1 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 133* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 134* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 135* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 136* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 137* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 138* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 139* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 140* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 140* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 141* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 142* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 143* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 144* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 145* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 146* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 147* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 148* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 149* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 150* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 150* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 151* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 152* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 153* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 154* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 155* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 156* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 157* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 158* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 159* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 160* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 160* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 161* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 162* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 163* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 164* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 165* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 166* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 167* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 168* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 169* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 170* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 170* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 171* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 172* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 173* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 174* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 175* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 176* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 177* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 178* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 179* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 180* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 180* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 181* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 182* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 183* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 184* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 185* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 186* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 187* | 0 | 78 | 4 | 0 | 8 | +0.2% | -0.006 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[1019\]$_DFFE_PN0P_/D 190* | 0 | 80 | 4 | 0 | 8 | +0.2% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 193* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 194* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 195* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 196* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 197* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 198* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 199* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 200* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 200* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 201* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 202* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 203* | 0 | 82 | 4 | 0 | 9 | +0.3% | -0.003 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[830\]$_DFFE_PN0P_/D 205* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 206* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 207* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 208* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 209* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 210* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 210* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 211* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 212* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 213* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 214* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 215* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 216* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 217* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 218* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 219* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 220* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 220* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 221* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 222* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 223* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 224* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 225* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 226* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 227* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 228* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 229* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 230* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 230* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 231* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 232* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 233* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 234* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 235* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 236* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 237* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 238* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 239* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 240* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 240* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 241* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 242* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 243* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 244* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 245* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 246* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 247* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 248* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 249* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 250* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 250* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 251* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 252* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 253* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 254* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 255* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 256* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 257* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 258* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 259* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 260* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 260* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 261* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 262* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 263* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 264* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 265* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 266* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 267* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 268* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 269* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 270* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 270* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 271* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 272* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 273* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 274* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 275* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 276* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 277* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 278* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 279* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 280* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 280* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 281* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 282* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 283* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 284* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 285* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 286* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 287* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 288* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 289* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 290* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 290* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 291* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 292* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 293* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 294* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 295* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 296* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 297* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 298* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 299* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 300* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 300* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 301* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 302* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 303* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 304* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 305* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 306* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 307* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 308* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 309* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 310* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 310* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 311* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 312* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 313* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 314* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 315* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 316* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 317* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 318* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 319* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 320* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 320* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 321* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 322* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 323* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 324* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 325* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 326* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 327* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 328* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 329* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 330* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 330* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 331* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 332* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 333* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 334* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 335* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 336* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 337* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 338* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 339* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 340* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 340* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 341* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 342* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 343* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 344* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 345* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 346* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 347* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 348* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 349* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 350* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 350* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 351* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 352* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 353* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 354* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 355* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 356* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 357* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 358* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 359* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 360* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 360* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 361* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 362* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 363* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 364* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 365* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 366* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 367* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 368* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 369* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 370* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 370* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 371* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 372* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 373* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 374* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 375* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 376* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 377* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 378* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 379* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 380* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 380* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 381* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 382* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 383* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 384* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 385* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 386* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 387* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 388* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 389* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 390* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 390* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 391* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 392* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 393* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 394* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 395* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 396* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 397* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 398* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 399* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 400* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 400* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 401* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 402* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 403* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 404* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 405* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 406* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 407* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 408* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 409* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 410* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 410* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 411* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 412* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 413* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 414* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 415* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 416* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 417* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 418* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 419* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 420* | 0 | 83 | 4 | 0 | 9 | +0.3% | -0.001 | -5.8 | -0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[968\]$_DFFE_PN0P_/D 421* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 422* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 423* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 424* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 425* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 426* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 427* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 428* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 429* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 430* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 430* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 431* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 432* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 433* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 434* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 435* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 436* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 437* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 438* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 439* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 440* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 440* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 441* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 442* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 443* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 444* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 445* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 446* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 447* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 448* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 449* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 450* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 450* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 451* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 452* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 453* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 454* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 455* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 456* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 457* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 458* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 459* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 460* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 460* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 461* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 462* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 463* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 464* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 465* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 466* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 467* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 468* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 469* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 470* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 470* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 471* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 472* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 473* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 474* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 475* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 476* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 477* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 478* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 479* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 480* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 480* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 481* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 482* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 483* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 484* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 485* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 486* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 487* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 488* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 489* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 490* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 490* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 491* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 492* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 493* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 494* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 495* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 496* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 497* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 498* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 499* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 500* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 500* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 501* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 502* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 503* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 504* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 505* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 506* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 507* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 508* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 509* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 510* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 510* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 511* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 512* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 513* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 514* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 515* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 516* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 517* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 518* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 519* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 520* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 520* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 521* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 522* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 523* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 524* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 525* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 526* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 527* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 528* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 529* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 530* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 530* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 531* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 532* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 533* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 534* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 535* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 536* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 537* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 538* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 539* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 540* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 540* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 541* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 542* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 543* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 544* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 545* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 546* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 547* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 548* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 549* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 550* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 550* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 551* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 552* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 553* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 554* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 555* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 556* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 557* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 558* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 559* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 560* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 560* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 561* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 562* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 563* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 564* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 565* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 566* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 567* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 568* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 569* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 570* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 570* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 571* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 572* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 573* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 574* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 575* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 576* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 577* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 578* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 579* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 580* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 580* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 581* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 582* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 583* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 584* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 585* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 586* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 587* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 588* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 589* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 590* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 590* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 591* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 592* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 593* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 594* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 595* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 596* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 597* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 598* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 599* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 600* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 600* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 601* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 602* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 603* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 604* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 605* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 606* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 607* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 608* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 609* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 610* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 610* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 611* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 612* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 613* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 614* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 615* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 616* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 617* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 618* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 619* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 620* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 620* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 621* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 622* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 623* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 624* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 625* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 626* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 627* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 628* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 629* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 630* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 630* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 631* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 632* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 633* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 634* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 635* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 636* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 637* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 638* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 639* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 640* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 640* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 641* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 642* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 643* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 644* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 645* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 646* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 647* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 648* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 649* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 650* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 650* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 651* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 652* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 653* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 654* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 655* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 656* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 657* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 658* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 659* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 660* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 660* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 661* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 662* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 663* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 664* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 665* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 666* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 667* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 668* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 669* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 670* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 670* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 671* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 672* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 673* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 674* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 675* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 676* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 677* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 678* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 679* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 680* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 680* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 681* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 682* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 683* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 684* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 685* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 686* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 687* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 688* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 689* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 690* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 690* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 691* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 692* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 693* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 694* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 695* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 696* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 697* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 698* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 699* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 700* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 700* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 701* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 702* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 703* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 704* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 705* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 706* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 707* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 708* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 709* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 710* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 710* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 711* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 712* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 713* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 714* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 715* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 716* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 717* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 718* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 719* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 720* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 720* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 721* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 722* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 723* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 724* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 725* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 726* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 727* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 728* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 729* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 730* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 730* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 731* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 732* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 733* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 734* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 735* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 736* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 737* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 738* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 739* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 740* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 740* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 741* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 742* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 743* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 744* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 745* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 746* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 747* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 748* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 749* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 750* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 750* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D 750* | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 641 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D final | 0 | 83 | 9 | 0 | 9 | +0.3% | 0.002 | -5.8 | 0.0 | 0 | gen_regfile_ff.register_file_i.rf_reg\[860\]$_DFFE_PN0P_/D ------------------------------------------------------------------------------------------------------------------------------ [INFO RSZ-0040] Inserted 9 buffers. [INFO RSZ-0051] Resized 83 instances: 83 up, 0 up match, 0 down, 0 VT [INFO RSZ-0043] Swapped pins on 9 instances. [INFO RSZ-0505] Runtime: 43.52s [INFO RSZ-0033] No hold violations found. [INFO RSZ-0506] Runtime: 0.23s Took 44 seconds: repair_timing -setup_margin 0 -hold_margin 0 -repair_tns 100 -verbose global_route -start_incremental detailed_placement [INFO DPL-0006] Core area: 80997.00 um^2, Instances area: 29945.22 um^2, Utilization: 37.0% [INFO DPL-0005] Diamond search max displacement: +/- 500 sites horizontally, +/- 100 rows vertically. [INFO DPL-1101] Legalizing using diamond search. Movements Summary --------------------------------------- Total cells: 15565 Diamond Move Success: 15565 (100.00%) Diamond Move Failure: 0 Rip-up and replace Success: 0 ( 0.00% of diamond failures) Rip-up and replace Failure: 0 Total Placement Failures: 0 --------------------------------------- [INFO DPL-0500] Runtime: 0.12s Placement Analysis --------------------------------- total displacement 43.0 u average displacement 0.0 u max displacement 2.0 u original HPWL 275954.9 u legalized HPWL 275986.8 u delta HPWL 0 % check_placement -verbose global_route -end_incremental -congestion_report_file ./reports/nangate45/ibex/ibex_m4_sp/congestion_post_repair_timing.rpt estimate_parasitics -global_routing global_route -start_incremental global_route -end_incremental -congestion_report_file ./reports/nangate45/ibex/ibex_m4_sp/congestion_post_recover_power.rpt Repair antennas... [WARNING GRT-0296] Disabled NDR (to reduce congestion) for net: clknet_0_clk_i_regs [WARNING GRT-0246] No diode with LEF class CORE ANTENNACELL found. [INFO ANT-0002] Found 0 net violations. [INFO ANT-0001] Found 0 pin violations. Estimate parasitics... estimate_parasitics -global_routing Report metrics stage 5, global route... ========================================================================== global route report_design_area -------------------------------------------------------------------------- Design area 29945 um^2 37% utilization. [INFO FLW-0007] clock core_clock period 2.200000 [WARNING FLW-0010] more than one clock found. Skipping sdc update. [INFO FLW-0011] Path endpoint path count 5798 write_db ./results/nangate45/ibex/ibex_m4_sp/5_1_grt.odb write_sdc -no_timestamp ./results/nangate45/ibex/ibex_m4_sp/5_1_grt.sdc Elapsed time: 3:32.04[h:]min:sec. CPU time: user 1216.47 sys 3.26 (575%). Peak memory: 531368KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 5_1_grt .odb 212 518 25dc13d80e4b7665c385 5_1_grt .sdc bdd9229f4685efd56851 /OpenROAD-flow-scripts/flow/scripts/flow.sh 5_2_route detail_route Running detail_route.tcl, stage 5_2_route read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/5_1_grt.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/5_1_grt.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl [WARNING STA-0450] virtual clock vclk_core_clock can not be propagated. detailed_route -output_drc ./reports/nangate45/ibex/ibex_m4_sp/5_route_drc.rpt -output_maze ./results/nangate45/ibex/ibex_m4_sp/maze.log -droute_end_iter 64 -verbose 1 -drc_report_iter_step 5 [INFO DRT-0149] Reading tech and libs. Units: 2000 Number of layers: 21 Number of macros: 135 Number of vias: 33 Number of viarulegen: 19 [INFO DRT-0150] Reading design. Design: ibex_core Die area: ( 0 0 ) ( 574570 574570 ) Number of track patterns: 20 Number of DEF vias: 0 Number of components: 16176 Number of terminals: 266 Number of snets: 2 Number of nets: 17989 [INFO DRT-0167] List of default vias: Layer via2 default via: via2_5 Layer via3 default via: via3_2 Layer via4 default via: via4_0 Layer via5 default via: via5_0 Layer via6 default via: via6_0 Layer via7 default via: via7_0 Layer via8 default via: via8_0 Layer via9 default via: via9_0 [INFO DRT-0162] Library cell analysis. [INFO DRT-0163] Instance analysis. [INFO DRT-0164] Number of unique instances = 159. [INFO DRT-0168] Init region query. [INFO DRT-0024] Complete active. [INFO DRT-0024] Complete Fr_VIA. [INFO DRT-0024] Complete metal1. [INFO DRT-0024] Complete via1. [INFO DRT-0024] Complete metal2. [INFO DRT-0024] Complete via2. [INFO DRT-0024] Complete metal3. [INFO DRT-0024] Complete via3. [INFO DRT-0024] Complete metal4. [INFO DRT-0024] Complete via4. [INFO DRT-0024] Complete metal5. [INFO DRT-0024] Complete via5. [INFO DRT-0024] Complete metal6. [INFO DRT-0024] Complete via6. [INFO DRT-0024] Complete metal7. [INFO DRT-0024] Complete via7. [INFO DRT-0024] Complete metal8. [INFO DRT-0024] Complete via8. [INFO DRT-0024] Complete metal9. [INFO DRT-0024] Complete via9. [INFO DRT-0024] Complete metal10. [INFO DRT-0033] active shape region query size = 0. [INFO DRT-0033] FR_VIA shape region query size = 0. [INFO DRT-0033] metal1 shape region query size = 344699. [INFO DRT-0033] via1 shape region query size = 3366. [INFO DRT-0033] metal2 shape region query size = 2244. [INFO DRT-0033] via2 shape region query size = 3366. [INFO DRT-0033] metal3 shape region query size = 2244. [INFO DRT-0033] via3 shape region query size = 3366. [INFO DRT-0033] metal4 shape region query size = 1502. [INFO DRT-0033] via4 shape region query size = 1050. [INFO DRT-0033] metal5 shape region query size = 210. [INFO DRT-0033] via5 shape region query size = 1050. [INFO DRT-0033] metal6 shape region query size = 210. [INFO DRT-0033] via6 shape region query size = 420. [INFO DRT-0033] metal7 shape region query size = 143. [INFO DRT-0033] via7 shape region query size = 0. [INFO DRT-0033] metal8 shape region query size = 0. [INFO DRT-0033] via8 shape region query size = 0. [INFO DRT-0033] metal9 shape region query size = 0. [INFO DRT-0033] via9 shape region query size = 0. [INFO DRT-0033] metal10 shape region query size = 0. [INFO DRT-0165] Start pin access. [INFO DRT-0078] Complete 953 pins. [INFO DRT-0079] Complete 100 unique inst patterns. [INFO DRT-0081] Complete 159 unique inst patterns. [INFO DRT-0084] Complete 9994 groups. #scanned instances = 16176 #unique instances = 159 #stdCellGenAp = 5923 #stdCellValidPlanarAp = 0 #stdCellValidViaAp = 4048 #stdCellPinNoAp = 0 #stdCellPinCnt = 58495 #instTermValidViaApCnt = 0 #macroGenAp = 0 #macroValidPlanarAp = 0 #macroValidViaAp = 0 #macroNoAp = 0 [INFO DRT-0166] Complete pin access. [INFO DRT-0267] cpu time = 00:02:45, elapsed time = 00:00:17, memory = 304.37 (MB), peak = 302.55 (MB) [INFO DRT-0156] guideIn read 100000 guides. [INFO DRT-0157] Number of guides: 140771 [INFO DRT-0169] Post process guides. [INFO DRT-0176] GCELLGRID X 0 DO 100 STEP 5700 ; [INFO DRT-0177] GCELLGRID Y 0 DO 100 STEP 5700 ; [INFO DRT-0026] Complete 100000 origin guides. [INFO DRT-0028] Complete active. [INFO DRT-0028] Complete Fr_VIA. [INFO DRT-0028] Complete metal1. [INFO DRT-0028] Complete via1. [INFO DRT-0028] Complete metal2. [INFO DRT-0028] Complete via2. [INFO DRT-0028] Complete metal3. [INFO DRT-0028] Complete via3. [INFO DRT-0028] Complete metal4. [INFO DRT-0028] Complete via4. [INFO DRT-0028] Complete metal5. [INFO DRT-0028] Complete via5. [INFO DRT-0028] Complete metal6. [INFO DRT-0028] Complete via6. [INFO DRT-0028] Complete metal7. [INFO DRT-0028] Complete via7. [INFO DRT-0028] Complete metal8. [INFO DRT-0028] Complete via8. [INFO DRT-0028] Complete metal9. [INFO DRT-0028] Complete via9. [INFO DRT-0028] Complete metal10. [INFO DRT-0178] Init guide query. [INFO DRT-0035] Complete active (guide). [INFO DRT-0035] Complete Fr_VIA (guide). [INFO DRT-0035] Complete metal1 (guide). [INFO DRT-0035] Complete via1 (guide). [INFO DRT-0035] Complete metal2 (guide). [INFO DRT-0035] Complete via2 (guide). [INFO DRT-0035] Complete metal3 (guide). [INFO DRT-0035] Complete via3 (guide). [INFO DRT-0035] Complete metal4 (guide). [INFO DRT-0035] Complete via4 (guide). [INFO DRT-0035] Complete metal5 (guide). [INFO DRT-0035] Complete via5 (guide). [INFO DRT-0035] Complete metal6 (guide). [INFO DRT-0035] Complete via6 (guide). [INFO DRT-0035] Complete metal7 (guide). [INFO DRT-0035] Complete via7 (guide). [INFO DRT-0035] Complete metal8 (guide). [INFO DRT-0035] Complete via8 (guide). [INFO DRT-0035] Complete metal9 (guide). [INFO DRT-0035] Complete via9 (guide). [INFO DRT-0035] Complete metal10 (guide). [INFO DRT-0036] active guide region query size = 0. [INFO DRT-0036] FR_VIA guide region query size = 0. [INFO DRT-0036] metal1 guide region query size = 47752. [INFO DRT-0036] via1 guide region query size = 0. [INFO DRT-0036] metal2 guide region query size = 42867. [INFO DRT-0036] via2 guide region query size = 0. [INFO DRT-0036] metal3 guide region query size = 23554. [INFO DRT-0036] via3 guide region query size = 0. [INFO DRT-0036] metal4 guide region query size = 2474. [INFO DRT-0036] via4 guide region query size = 0. [INFO DRT-0036] metal5 guide region query size = 0. [INFO DRT-0036] via5 guide region query size = 0. [INFO DRT-0036] metal6 guide region query size = 0. [INFO DRT-0036] via6 guide region query size = 0. [INFO DRT-0036] metal7 guide region query size = 0. [INFO DRT-0036] via7 guide region query size = 0. [INFO DRT-0036] metal8 guide region query size = 0. [INFO DRT-0036] via8 guide region query size = 0. [INFO DRT-0036] metal9 guide region query size = 0. [INFO DRT-0036] via9 guide region query size = 0. [INFO DRT-0036] metal10 guide region query size = 0. [INFO DRT-0179] Init gr pin query. [INFO DRT-0267] cpu time = 00:00:01, elapsed time = 00:00:00, memory = 350.58 (MB), peak = 346.55 (MB) [INFO DRT-0245] skipped writing guide updates to database. [INFO DRT-0181] Start track assignment. [INFO DRT-0184] Done with 45341 vertical wires in 2 frboxes and 71306 horizontal wires in 2 frboxes. [INFO DRT-0186] Done with 11374 vertical wires in 2 frboxes and 14099 horizontal wires in 2 frboxes. [INFO DRT-0182] Complete track assignment. [INFO DRT-0267] cpu time = 00:00:08, elapsed time = 00:00:04, memory = 716.46 (MB), peak = 712.30 (MB) [INFO DRT-0187] Start routing data preparation. [INFO DRT-0267] cpu time = 00:00:00, elapsed time = 00:00:00, memory = 716.46 (MB), peak = 712.30 (MB) [INFO DRT-0194] Start detail routing. [INFO DRT-0195] Start 0th optimization iteration. Completing 10% with 0 violations. elapsed time = 00:00:04, memory = 1418.82 (MB). Completing 20% with 0 violations. elapsed time = 00:00:05, memory = 1314.26 (MB). Completing 30% with 517 violations. elapsed time = 00:00:09, memory = 1604.29 (MB). Completing 40% with 517 violations. elapsed time = 00:00:12, memory = 1681.82 (MB). Completing 50% with 517 violations. elapsed time = 00:00:14, memory = 1651.53 (MB). Completing 60% with 1101 violations. elapsed time = 00:00:18, memory = 1896.56 (MB). Completing 70% with 1101 violations. elapsed time = 00:00:21, memory = 1894.65 (MB). Completing 80% with 1648 violations. elapsed time = 00:00:27, memory = 2257.00 (MB). Completing 90% with 1648 violations. elapsed time = 00:00:30, memory = 2191.47 (MB). Completing 100% with 2297 violations. elapsed time = 00:00:33, memory = 1948.45 (MB). [INFO DRT-0199] Number of violations = 3705. Viol/Layer metal1 via1 metal2 via2 metal3 via3 metal4 Cut Spacing 0 3 0 5 0 0 0 Metal Spacing 0 0 233 0 24 0 1 Recheck 41 0 836 0 528 0 3 Short 0 10 1629 3 371 1 17 [INFO DRT-0267] cpu time = 00:04:22, elapsed time = 00:00:34, memory = 2438.18 (MB), peak = 2433.77 (MB) Total wire length = 340620 um. Total wire length on LAYER metal1 = 0 um. Total wire length on LAYER metal2 = 124403 um. Total wire length on LAYER metal3 = 159061 um. Total wire length on LAYER metal4 = 57155 um. Total wire length on LAYER metal5 = 0 um. Total wire length on LAYER metal6 = 0 um. Total wire length on LAYER metal7 = 0 um. Total wire length on LAYER metal8 = 0 um. Total wire length on LAYER metal9 = 0 um. Total wire length on LAYER metal10 = 0 um. Total number of vias = 120688. Up-via summary (total 120688): ----------------- active 0 metal1 57269 metal2 58988 metal3 4415 metal4 8 metal5 8 metal6 0 metal7 0 metal8 0 metal9 0 ----------------- 120688 [INFO DRT-0195] Start 1st optimization iteration. Completing 10% with 3705 violations. elapsed time = 00:00:02, memory = 2712.22 (MB). Completing 20% with 3705 violations. elapsed time = 00:00:04, memory = 2671.10 (MB). Completing 30% with 3015 violations. elapsed time = 00:00:08, memory = 2662.32 (MB). Completing 40% with 3015 violations. elapsed time = 00:00:11, memory = 2680.22 (MB). Completing 50% with 3015 violations. elapsed time = 00:00:14, memory = 2688.98 (MB). Completing 60% with 2290 violations. elapsed time = 00:00:19, memory = 2722.62 (MB). Completing 70% with 2290 violations. elapsed time = 00:00:21, memory = 2740.79 (MB). Completing 80% with 1607 violations. elapsed time = 00:00:25, memory = 2749.79 (MB). Completing 90% with 1607 violations. elapsed time = 00:00:30, memory = 2768.11 (MB). Completing 100% with 964 violations. elapsed time = 00:00:32, memory = 2763.20 (MB). [INFO DRT-0199] Number of violations = 964. Viol/Layer metal1 via1 metal2 metal3 metal4 Cut Spacing 0 1 0 0 0 Metal Spacing 0 0 184 13 0 Recheck 1 0 4 0 0 Short 0 0 685 75 1 [INFO DRT-0267] cpu time = 00:04:00, elapsed time = 00:00:33, memory = 2769.20 (MB), peak = 2771.85 (MB) Total wire length = 338685 um. Total wire length on LAYER metal1 = 0 um. Total wire length on LAYER metal2 = 123205 um. Total wire length on LAYER metal3 = 158475 um. Total wire length on LAYER metal4 = 57004 um. Total wire length on LAYER metal5 = 0 um. Total wire length on LAYER metal6 = 0 um. Total wire length on LAYER metal7 = 0 um. Total wire length on LAYER metal8 = 0 um. Total wire length on LAYER metal9 = 0 um. Total wire length on LAYER metal10 = 0 um. Total number of vias = 119679. Up-via summary (total 119679): ----------------- active 0 metal1 57328 metal2 57951 metal3 4384 metal4 8 metal5 8 metal6 0 metal7 0 metal8 0 metal9 0 ----------------- 119679 [INFO DRT-0195] Start 2nd optimization iteration. Completing 10% with 964 violations. elapsed time = 00:00:00, memory = 2769.20 (MB). Completing 20% with 964 violations. elapsed time = 00:00:03, memory = 2785.80 (MB). Completing 30% with 948 violations. elapsed time = 00:00:05, memory = 2777.61 (MB). Completing 40% with 948 violations. elapsed time = 00:00:07, memory = 2783.32 (MB). Completing 50% with 948 violations. elapsed time = 00:00:09, memory = 2783.32 (MB). Completing 60% with 917 violations. elapsed time = 00:00:10, memory = 2783.32 (MB). Completing 70% with 917 violations. elapsed time = 00:00:14, memory = 2806.11 (MB). Completing 80% with 895 violations. elapsed time = 00:00:17, memory = 2811.85 (MB). Completing 90% with 895 violations. elapsed time = 00:00:22, memory = 2813.68 (MB). Completing 100% with 824 violations. elapsed time = 00:00:24, memory = 2813.68 (MB). [INFO DRT-0199] Number of violations = 824. Viol/Layer metal2 via2 metal3 metal4 Cut Spacing 0 3 0 0 Metal Spacing 197 0 9 0 Recheck 3 0 0 0 Short 554 0 57 1 [INFO DRT-0267] cpu time = 00:03:14, elapsed time = 00:00:24, memory = 2816.68 (MB), peak = 2811.86 (MB) Total wire length = 338152 um. Total wire length on LAYER metal1 = 0 um. Total wire length on LAYER metal2 = 123081 um. Total wire length on LAYER metal3 = 158186 um. Total wire length on LAYER metal4 = 56883 um. Total wire length on LAYER metal5 = 0 um. Total wire length on LAYER metal6 = 0 um. Total wire length on LAYER metal7 = 0 um. Total wire length on LAYER metal8 = 0 um. Total wire length on LAYER metal9 = 0 um. Total wire length on LAYER metal10 = 0 um. Total number of vias = 119251. Up-via summary (total 119251): ----------------- active 0 metal1 57338 metal2 57558 metal3 4339 metal4 8 metal5 8 metal6 0 metal7 0 metal8 0 metal9 0 ----------------- 119251 [INFO DRT-0195] Start 3rd optimization iteration. Completing 10% with 824 violations. elapsed time = 00:00:00, memory = 2816.68 (MB). Completing 20% with 824 violations. elapsed time = 00:00:01, memory = 2851.91 (MB). Completing 30% with 669 violations. elapsed time = 00:00:01, memory = 2822.41 (MB). Completing 40% with 669 violations. elapsed time = 00:00:02, memory = 2822.41 (MB). Completing 50% with 669 violations. elapsed time = 00:00:03, memory = 2822.41 (MB). Completing 60% with 462 violations. elapsed time = 00:00:04, memory = 2830.42 (MB). Completing 70% with 462 violations. elapsed time = 00:00:05, memory = 2831.35 (MB). Completing 80% with 253 violations. elapsed time = 00:00:07, memory = 2831.35 (MB). Completing 90% with 253 violations. elapsed time = 00:00:08, memory = 2831.35 (MB). Completing 100% with 21 violations. elapsed time = 00:00:09, memory = 2831.35 (MB). [INFO DRT-0199] Number of violations = 21. Viol/Layer metal2 Metal Spacing 3 Short 18 [INFO DRT-0267] cpu time = 00:01:13, elapsed time = 00:00:10, memory = 2831.35 (MB), peak = 2847.36 (MB) Total wire length = 338094 um. Total wire length on LAYER metal1 = 0 um. Total wire length on LAYER metal2 = 121535 um. Total wire length on LAYER metal3 = 158303 um. Total wire length on LAYER metal4 = 58255 um. Total wire length on LAYER metal5 = 0 um. Total wire length on LAYER metal6 = 0 um. Total wire length on LAYER metal7 = 0 um. Total wire length on LAYER metal8 = 0 um. Total wire length on LAYER metal9 = 0 um. Total wire length on LAYER metal10 = 0 um. Total number of vias = 120074. Up-via summary (total 120074): ----------------- active 0 metal1 57344 metal2 58012 metal3 4702 metal4 8 metal5 8 metal6 0 metal7 0 metal8 0 metal9 0 ----------------- 120074 [INFO DRT-0195] Start 4th guides tiles iteration. Completing 10% with 21 violations. elapsed time = 00:00:00, memory = 2831.35 (MB). Completing 30% with 21 violations. elapsed time = 00:00:00, memory = 2831.35 (MB). Completing 50% with 21 violations. elapsed time = 00:00:00, memory = 2831.35 (MB). Completing 60% with 18 violations. elapsed time = 00:00:00, memory = 2831.35 (MB). Completing 80% with 18 violations. elapsed time = 00:00:00, memory = 2831.36 (MB). Completing 100% with 0 violations. elapsed time = 00:00:00, memory = 2831.36 (MB). [INFO DRT-0199] Number of violations = 0. [INFO DRT-0267] cpu time = 00:00:02, elapsed time = 00:00:01, memory = 2831.36 (MB), peak = 2847.36 (MB) Total wire length = 338091 um. Total wire length on LAYER metal1 = 0 um. Total wire length on LAYER metal2 = 121469 um. Total wire length on LAYER metal3 = 158302 um. Total wire length on LAYER metal4 = 58319 um. Total wire length on LAYER metal5 = 0 um. Total wire length on LAYER metal6 = 0 um. Total wire length on LAYER metal7 = 0 um. Total wire length on LAYER metal8 = 0 um. Total wire length on LAYER metal9 = 0 um. Total wire length on LAYER metal10 = 0 um. Total number of vias = 120083. Up-via summary (total 120083): ----------------- active 0 metal1 57344 metal2 58015 metal3 4708 metal4 8 metal5 8 metal6 0 metal7 0 metal8 0 metal9 0 ----------------- 120083 [INFO DRT-0198] Complete detail routing. Total wire length = 338091 um. Total wire length on LAYER metal1 = 0 um. Total wire length on LAYER metal2 = 121469 um. Total wire length on LAYER metal3 = 158302 um. Total wire length on LAYER metal4 = 58319 um. Total wire length on LAYER metal5 = 0 um. Total wire length on LAYER metal6 = 0 um. Total wire length on LAYER metal7 = 0 um. Total wire length on LAYER metal8 = 0 um. Total wire length on LAYER metal9 = 0 um. Total wire length on LAYER metal10 = 0 um. Total number of vias = 120083. Up-via summary (total 120083): ----------------- active 0 metal1 57344 metal2 58015 metal3 4708 metal4 8 metal5 8 metal6 0 metal7 0 metal8 0 metal9 0 ----------------- 120083 [INFO DRT-0267] cpu time = 00:12:53, elapsed time = 00:01:44, memory = 2831.36 (MB), peak = 2847.36 (MB) [INFO DRT-0180] Post processing. [INFO DRT-0501] Runtime: 126.97s Took 127 seconds: detailed_route -output_drc ./reports/nangate45/ibex/ibex_m4_sp/5_route_drc.rpt -output_maze ./results/nangate45/ibex/ibex_m4_sp/maze.log -droute_end_iter 64 -verbose 1 -drc_report_iter_step 5 [WARNING GRT-0246] No diode with LEF class CORE ANTENNACELL found. [INFO ANT-0002] Found 0 net violations. [INFO ANT-0001] Found 0 pin violations. [INFO ANT-0002] Found 0 net violations. [INFO ANT-0001] Found 0 pin violations. Design area 29945 um^2 37% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/5_2_route.odb Elapsed time: 2:10.88[h:]min:sec. CPU time: user 967.96 sys 2.65 (741%). Peak memory: 2915700KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 5_2_route .odb 130 2847 f8c0107f92f64c1a3caa /OpenROAD-flow-scripts/flow/scripts/flow.sh 5_3_fillcell fillcell Running fillcell.tcl, stage 5_3_fillcell read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/5_2_route.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/5_1_grt.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl [WARNING STA-0450] virtual clock vclk_core_clock can not be propagated. filler_placement "FILLCELL_X1 FILLCELL_X2 FILLCELL_X4 FILLCELL_X8 FILLCELL_X16 FILLCELL_X32" [INFO DPL-0001] Placed 23828 filler instances. Design area 29945 um^2 37% utilization. write_db ./results/nangate45/ibex/ibex_m4_sp/5_3_fillcell.odb Elapsed time: 0:00.76[h:]min:sec. CPU time: user 0.68 sys 0.08 (99%). Peak memory: 194252KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 5_3_fillcell .odb 0 189 da93e446d98434bd8444 cp ./results/nangate45/ibex/ibex_m4_sp/5_3_fillcell.odb ./results/nangate45/ibex/ibex_m4_sp/5_route.odb cp ./results/nangate45/ibex/ibex_m4_sp/5_1_grt.sdc ./results/nangate45/ibex/ibex_m4_sp/5_route.sdc /OpenROAD-flow-scripts/flow/scripts/flow.sh 6_1_fill density_fill Running density_fill.tcl, stage 6_1_fill read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/5_route.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/5_route.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl exec cp ./results/nangate45/ibex/ibex_m4_sp/5_route.odb ./results/nangate45/ibex/ibex_m4_sp/6_1_fill.odb Elapsed time: 0:00.47[h:]min:sec. CPU time: user 0.39 sys 0.07 (98%). Peak memory: 157904KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 6_1_fill .odb 0 154 da93e446d98434bd8444 cp ./results/nangate45/ibex/ibex_m4_sp/5_route.sdc ./results/nangate45/ibex/ibex_m4_sp/6_1_fill.sdc /OpenROAD-flow-scripts/flow/scripts/flow.sh 6_report final_report Running final_report.tcl, stage 6_report read_liberty /OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib read_db ./results/nangate45/ibex/ibex_m4_sp/6_1_fill.odb read_sdc ./results/nangate45/ibex/ibex_m4_sp/6_1_fill.sdc source /OpenROAD-flow-scripts/flow/platforms/nangate45/setRC.tcl [WARNING STA-0450] virtual clock vclk_core_clock can not be propagated. write_db ./results/nangate45/ibex/ibex_m4_sp/6_final.odb Deleted 0 routing obstructions [INFO RCX-0431] Defined process_corner X with ext_model_index 0 [INFO RCX-0029] Defined extraction corner X [WARNING RCX-0514] The -ext_model_file option is deprecated. Use set_extraction_rules_file command instead. [INFO RCX-0435] Reading extraction model file /OpenROAD-flow-scripts/flow/platforms/nangate45/rcx_patterns.rules ... [INFO RCX-0436] RC segment generation ibex_core (max_merge_res 50.0) ... [INFO RCX-0040] Final 76902 rc segments [INFO RCX-0439] Coupling Cap extraction ibex_core ... [INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded. [INFO RCX-0442] 22% of 119482 wires extracted [INFO RCX-0442] 47% of 119482 wires extracted [INFO RCX-0442] 72% of 119482 wires extracted [INFO RCX-0442] 100% of 119482 wires extracted [INFO RCX-0045] Extract 17989 nets, 93033 rsegs, 93033 caps, 197604 ccs [INFO RCX-0443] 17989 nets finished [INFO PSM-0040] All shapes on net VDD are connected. ########## IR report ################# Net : VDD Corner : default Total power : 3.41e-02 W Supply voltage : 1.10e+00 V Worstcase voltage: 1.09e+00 V Average voltage : 1.10e+00 V Average IR drop : 2.39e-03 V Worstcase IR drop: 9.38e-03 V Percentage drop : 0.85 % ###################################### [INFO PSM-0040] All shapes on net VSS are connected. ########## IR report ################# Net : VSS Corner : default Total power : 3.41e-02 W Supply voltage : 0.00e+00 V Worstcase voltage: 1.18e-02 V Average voltage : 2.07e-03 V Average IR drop : 2.07e-03 V Worstcase IR drop: 1.18e-02 V Percentage drop : 1.07 % ###################################### Cell type report: Count Area Fill cell 23828 51051.78 Tap cell 611 162.53 Clock buffer 457 545.30 Timing Repair Buffer 1541 1797.10 Inverter 571 305.90 Clock inverter 113 77.67 Sequential cell 1938 10096.03 Multi-Input combinational cell 10945 16960.69 Total 40004 80997.00 Report metrics stage 6, finish... ========================================================================== finish report_design_area -------------------------------------------------------------------------- Design area 29945 um^2 37% utilization. [WARNING GUI-0076] QStandardPaths: XDG_RUNTIME_DIR not set, defaulting to '/tmp/runtime-root' [WARNING GUI-0066] Heat map "IR Drop" has not been populated with data. [WARNING GUI-0066] Heat map "Routing Congestion" has not been populated with data. Elapsed time: 0:24.53[h:]min:sec. CPU time: user 36.18 sys 1.47 (153%). Peak memory: 559160KB. Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 6_report 24 546 N/A cp ./results/nangate45/ibex/ibex_m4_sp/5_route.sdc ./results/nangate45/ibex/ibex_m4_sp/6_final.sdc cp /OpenROAD-flow-scripts/flow/platforms/nangate45/lef/NangateOpenCellLibrary.tech.lef ./objects/nangate45/ibex/ibex_m4_sp/klayout_tech.lef /usr/bin/python3 /OpenROAD-flow-scripts/flow/util/generate_klayout_tech.py \ --template /OpenROAD-flow-scripts/flow/platforms/nangate45/FreePDK45.lyt \ --output ./objects/nangate45/ibex/ibex_m4_sp/klayout.lyt \ --lef-files ./objects/nangate45/ibex/ibex_m4_sp/klayout_tech.lef /OpenROAD-flow-scripts/flow/platforms/nangate45/lef/NangateOpenCellLibrary.macro.mod.lef \ --map-files /usr/bin/python3 /OpenROAD-flow-scripts/flow/scripts/run_command.py --log /OpenROAD-flow-scripts/flow/logs/nangate45/ibex/ibex_m4_sp/6_1_merge.log --tee -- \ /OpenROAD-flow-scripts/flow/scripts/klayout.sh -zz -rd design_name=ibex_core \ -rd in_def=./results/nangate45/ibex/ibex_m4_sp/6_final.def \ -rd in_files="/OpenROAD-flow-scripts/flow/platforms/nangate45/gds/NangateOpenCellLibrary.gds " \ -rd seal_file="" \ -rd out_file=./results/nangate45/ibex/ibex_m4_sp/6_1_merged.gds \ -rd tech_file=./objects/nangate45/ibex/ibex_m4_sp/klayout.lyt \ -rd layer_map= \ -r /OpenROAD-flow-scripts/flow/util/def2stream.py KLayout 0.30.7 Warning: DEF UNITS does not match reader DBU (DEF UNITS is 2000 and corresponds to a DBU of 0.0005, but reader DBU is set to 0.0001) (line=5, cell=, file=6_final.def) [INFO] Reporting cells prior to loading DEF ... /OpenROAD-flow-scripts/flow/platforms/nangate45/gds/NangateOpenCellLibrary.gds [INFO] GDS_ALLOW_EMPTY=fakeram.* [INFO] All LEF cells have matching GDS/OAS cells [INFO] No orphan cells in the final layout Elapsed time: 0:02.32[h:]min:sec. CPU time: user 2.11 sys 0.19 (99%). Peak memory: 506836KB. cp results/nangate45/ibex/ibex_m4_sp/6_1_merged.gds results/nangate45/ibex/ibex_m4_sp/6_final.gds ./logs/nangate45/ibex/ibex_m4_sp Log Ext Elapsed/s Peak Memory/MB sha1sum result [0:20) 1_1_yosys_canonicalize .rtlil 1 60 d62ca5e98a2d8d44c61d 1_2_yosys .v 53 108 b84ec8ca456cbad0a509 1_2_yosys .sdc b8e34dfe4892c3febdff 1_synth .odb 0 148 9396d936f1563e2c8258 1_synth .sdc 8e98133a22ebf9c7195d 2_1_floorplan .odb 22 190 daa00aa10544e7357176 2_1_floorplan .sdc 8e98133a22ebf9c7195d 2_2_floorplan_macro .odb 0 133 daa00aa10544e7357176 2_3_floorplan_tapcell .odb 0 124 9296c6efd74bbf58a508 2_4_floorplan_pdn .odb 0 138 c3143409d109579a6c04 3_1_place_gp_skip_io .odb 402 161 ef8231bacb28e803d9ca 3_2_place_iop .odb 0 135 ce5cfccc07f48df00d60 3_3_place_gp .odb 1415 446 ae152c3b458700c2b465 3_4_place_resized .odb 8 195 ae152c3b458700c2b465 3_5_place_dp .odb 11 225 58a19acdca1ddbbd3719 4_1_cts .odb 20 278 67baf27a132ecb16d309 5_1_grt .odb 212 518 25dc13d80e4b7665c385 5_1_grt .sdc bdd9229f4685efd56851 5_2_route .odb 130 2847 f8c0107f92f64c1a3caa 5_3_fillcell .odb 0 189 da93e446d98434bd8444 6_1_fill .odb 0 154 da93e446d98434bd8444 6_1_fill .sdc bdd9229f4685efd56851 6_1_merge 2 494 N/A 6_report 24 546 N/A Total 2300 2847